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| author | John Fastabend <john.r.fastabend@intel.com> | 2010-10-28 00:59:57 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-10-28 10:19:00 -0700 |
| commit | 9806307a1c5a2a79e268ae4e78b437d38c8adf7f (patch) | |
| tree | 1a4ceada09e85a3cd9083790c6b16a16e99bb928 /drivers/net/ixgbe/ixgbe_dcb.h | |
| parent | affa9dfb04b7e2e3a0b0e6d844ea0c9ed97505f9 (diff) | |
| download | kernel_samsung_smdk4412-9806307a1c5a2a79e268ae4e78b437d38c8adf7f.tar.gz kernel_samsung_smdk4412-9806307a1c5a2a79e268ae4e78b437d38c8adf7f.tar.bz2 kernel_samsung_smdk4412-9806307a1c5a2a79e268ae4e78b437d38c8adf7f.zip | |
ixgbe: DCB, fix TX hang occurring in stress condition with PFC
The DCB credits refill quantum _must_ be greater than half the max
packet size. This is needed to guarantee that TX DMA operations
are not attempted during a pause state. Additionally, the min IFG
must be set correctly for DCB mode. If a DMA operation is
requested unexpectedly during the pause state the HW data
store may be corrupted leading to a DMA hang. The DMA hang
requires a reset to correct. This fixes the HW configuration
to avoid this condition.
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_dcb.h')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/net/ixgbe/ixgbe_dcb.h b/drivers/net/ixgbe/ixgbe_dcb.h index eb1059f09da..0208a87b129 100644 --- a/drivers/net/ixgbe/ixgbe_dcb.h +++ b/drivers/net/ixgbe/ixgbe_dcb.h @@ -150,15 +150,14 @@ struct ixgbe_dcb_config { /* DCB driver APIs */ /* DCB credits calculation */ -s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *, u8); +s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *, int, u8); /* DCB hw initialization */ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *); /* DCB definitions for credit calculation */ +#define DCB_CREDIT_QUANTUM 64 /* DCB Quantum */ #define MAX_CREDIT_REFILL 511 /* 0x1FF * 64B = 32704B */ -#define MINIMUM_CREDIT_REFILL 5 /* 5*64B = 320B */ -#define MINIMUM_CREDIT_FOR_JUMBO 145 /* 145= UpperBound((9*1024+54)/64B) for 9KB jumbo frame */ #define DCB_MAX_TSO_SIZE (32*1024) /* MAX TSO packet size supported in DCB mode */ #define MINIMUM_CREDIT_FOR_TSO (DCB_MAX_TSO_SIZE/64 + 1) /* 513 for 32KB TSO packet */ #define MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1204 / 64B */ |