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author | Daniel Hillenbrand <daniel.hillenbrand@codeworkx.de> | 2012-07-21 23:04:45 +0200 |
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committer | Daniel Hillenbrand <daniel.hillenbrand@codeworkx.de> | 2012-07-21 23:04:45 +0200 |
commit | 0a1182796f6475b8cb2ff1781dad873a744b3197 (patch) | |
tree | e15b5256dac226c49a25b5e24594cd638e2fec2c /arch | |
parent | 633018c13fe06461d9c60692fbb114734aa37802 (diff) | |
download | kernel_samsung_smdk4412-0a1182796f6475b8cb2ff1781dad873a744b3197.tar.gz kernel_samsung_smdk4412-0a1182796f6475b8cb2ff1781dad873a744b3197.tar.bz2 kernel_samsung_smdk4412-0a1182796f6475b8cb2ff1781dad873a744b3197.zip |
samsung opensource update3
Diffstat (limited to 'arch')
26 files changed, 311 insertions, 253 deletions
diff --git a/arch/arm/configs/m0_00_defconfig b/arch/arm/configs/m0_00_defconfig index 8da644e8e2e..2e2ea694fb3 100644 --- a/arch/arm/configs/m0_00_defconfig +++ b/arch/arm/configs/m0_00_defconfig @@ -414,6 +414,7 @@ CONFIG_BUSFREQ_QOS_NONE=y CONFIG_SEC_THERMISTOR=y # CONFIG_EXYNOS_SYSREG_PM is not set CONFIG_ANDROID_WIP=y +# CONFIG_COMPACTION_RETRY is not set # # EXYNOS4 Machines @@ -790,7 +791,7 @@ CONFIG_INET_ESP=y # CONFIG_INET_XFRM_TUNNEL is not set CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_MODE_TRANSPORT=y -# CONFIG_INET_XFRM_MODE_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TUNNEL=y # CONFIG_INET_XFRM_MODE_BEET is not set # CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y @@ -852,7 +853,7 @@ CONFIG_NF_CONNTRACK_NETBIOS_NS=y # CONFIG_NF_CONNTRACK_SNMP is not set CONFIG_NF_CONNTRACK_PPTP=y CONFIG_NF_CONNTRACK_SANE=y -CONFIG_NF_CONNTRACK_SIP=y +# CONFIG_NF_CONNTRACK_SIP is not set CONFIG_NF_CONNTRACK_TFTP=y CONFIG_NF_CT_NETLINK=y CONFIG_NETFILTER_TPROXY=y @@ -962,7 +963,7 @@ CONFIG_NF_NAT_TFTP=y CONFIG_NF_NAT_AMANDA=y CONFIG_NF_NAT_PPTP=y CONFIG_NF_NAT_H323=y -CONFIG_NF_NAT_SIP=y +# CONFIG_NF_NAT_SIP is not set CONFIG_IP_NF_MANGLE=y # CONFIG_IP_NF_TARGET_CLUSTERIP is not set # CONFIG_IP_NF_TARGET_ECN is not set @@ -2055,7 +2056,7 @@ CONFIG_JPEG_V2_1=y # # Reserved memory configurations # -CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC0=61464 +CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC0=62464 CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC1=15360 CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC2=0 CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC3=0 @@ -2142,6 +2143,9 @@ CONFIG_FB_S5P_MIPI_DSIM=y # CONFIG_FB_S5P_DUMMY_MIPI_LCD is not set CONFIG_FB_S5P_S6E8AA0=y # CONFIG_FB_S5P_S6D6AA1 is not set +# CONFIG_FB_S5P_S6E63M0 is not set +# CONFIG_S6E8AA0_AMS529HA01 is not set +CONFIG_S6E8AA0_AMS480GYXX=y CONFIG_AID_DIMMING=y CONFIG_LCD_FREQ_SWITCH=y CONFIG_FB_S5P_EXTDSP=y diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 3903ef6f171..864bf024c4a 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -646,6 +646,27 @@ config ANDROID_WIP This enables 'work in progress' hacks for android issues. Please remove it later. +config COMPACTION_RETRY + bool "retry compaction once more after direct reclaim fails" + default n + depends on COMPACTION + help + This enables compaction retry in android. + If fails to get pages even with direct reclaim, + we give one more try to allocate pages with forced compaction. + This might avoid oom-killer invocation. + with many free pages being already there. + +config COMPACTION_RETRY_DEBUG + bool "debug information for COMPACTION_RETRY" + default n + depends on COMPACTION_RETRY + help + This enables debug feature for compaction retry. + This shows us the buddy information + before and after compation retrial. + This should be turned off later. + # machine support menu "EXYNOS4 Machines" diff --git a/arch/arm/mach-exynos/board-bluetooth-bcm4334.c b/arch/arm/mach-exynos/board-bluetooth-bcm4334.c index 7d7c00eb29b..ea8b5bb0ae8 100644 --- a/arch/arm/mach-exynos/board-bluetooth-bcm4334.c +++ b/arch/arm/mach-exynos/board-bluetooth-bcm4334.c @@ -116,6 +116,7 @@ static int bcm4334_bt_rfkill_set_power(void *data, bool blocked) bt_uart_on_table); #endif gpio_set_value(GPIO_BT_EN, 1); + bt_is_running = 1; msleep(50); } else { pr_info("[BT] Bluetooth Power Off.\n"); diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index ad5d5b4028f..3aead34ba1a 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -2342,12 +2342,6 @@ void __init_or_cpufreq exynos4_setup_clocks(void) clk_fout_epll.ops = &exynos4_epll_ops; -#if defined(CONFIG_MACH_M0) && defined(CONFIG_TARGET_LOCALE_EUR) - if (clk_set_parent(&exynos4_clk_dout_mmc3.clk, &exynos4_clk_mout_epll.clk)) - printk(KERN_ERR "Unable to set parent %s of clock %s.\n", - exynos4_clk_mout_epll.clk.name, exynos4_clk_dout_mmc3.clk.name); -#endif - #ifdef CONFIG_EXYNOS4_MSHC_EPLL_45MHZ if (clk_set_parent(&exynos4_clk_dout_mmc4.clk, &exynos4_clk_mout_epll.clk)) printk(KERN_ERR "Unable to set parent %s of clock %s.\n", diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index 9e14ed94c8f..0ed0197d329 100644 --- a/arch/arm/mach-exynos/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c @@ -1038,9 +1038,7 @@ static int exynos4212_clock_suspend(void) { s3c_pm_do_save(exynos4212_clock_save, ARRAY_SIZE(exynos4212_clock_save)); s3c_pm_do_save(exynos4212_vpll_save, ARRAY_SIZE(exynos4212_vpll_save)); -#if defined(CONFIG_MACH_M0) && defined(CONFIG_TARGET_LOCALE_EUR) s3c_pm_do_save(exynos4212_epll_save, ARRAY_SIZE(exynos4212_epll_save)); -#endif return 0; } @@ -1050,9 +1048,7 @@ static void exynos4212_clock_resume(void) unsigned int tmp; s3c_pm_do_restore_core(exynos4212_vpll_save, ARRAY_SIZE(exynos4212_vpll_save)); -#if defined(CONFIG_MACH_M0) && defined(CONFIG_TARGET_LOCALE_EUR) s3c_pm_do_restore_core(exynos4212_epll_save, ARRAY_SIZE(exynos4212_epll_save)); -#endif /* waiting epll & vpll locking time */ do { diff --git a/arch/arm/mach-exynos/include/mach/dsim.h b/arch/arm/mach-exynos/include/mach/dsim.h index de60369b32e..90de6ff71e4 100644 --- a/arch/arm/mach-exynos/include/mach/dsim.h +++ b/arch/arm/mach-exynos/include/mach/dsim.h @@ -254,6 +254,5 @@ extern void s5p_dsim_enable_clk(void *d_clk, unsigned char enable); extern void s5p_dsim_part_reset(void); extern void s5p_dsim_init_d_phy(unsigned int dsim_base); extern void s5p_dsim_exit_d_phy(unsigned int dsim_base); -extern void exynos4_dsim_gpio_setup_24bpp(void); #endif /* _DSIM_H */ diff --git a/arch/arm/mach-exynos/include/mach/secmem.h b/arch/arm/mach-exynos/include/mach/secmem.h index 2b21366cafa..42a85758f8e 100644 --- a/arch/arm/mach-exynos/include/mach/secmem.h +++ b/arch/arm/mach-exynos/include/mach/secmem.h @@ -61,10 +61,10 @@ void secmem_crypto_deregister(void); #define SECMEM_IOC_GET_ADDR _IOWR('S', 6, int) #define SECMEM_IOC_RELEASE_ADDR _IOWR('S', 7, int) #if defined(CONFIG_CPU_EXYNOS5250) -#define SECMEM_IOC_GET_FD_PHYS_ADDR _IOWR('S', 8, int) +#define SECMEM_IOC_GET_FD_PHYS_ADDR _IOWR('S', 8, int) #endif #define SECMEM_IOC_MFC_MAGIC_KEY _IOWR('S', 9, int) - +#define SECMEM_IOC_TEXT_CHUNKINFO _IOWR('S', 10, struct secchunk_info) #endif /* __ASM_ARCH_SECMEM_H */ diff --git a/arch/arm/mach-exynos/mach-midas.c b/arch/arm/mach-exynos/mach-midas.c index 5603258d9d1..4f216303b4b 100644 --- a/arch/arm/mach-exynos/mach-midas.c +++ b/arch/arm/mach-exynos/mach-midas.c @@ -209,7 +209,7 @@ static struct s3c64xx_spi_csinfo spi1_csi[] = { [0] = { .line = EXYNOS4_GPB(5), .set_level = gpio_set_value, - .fb_delay = 0x2, + .fb_delay = 0x00, }, }; @@ -1396,9 +1396,11 @@ static struct samsung_battery_platform_data samsung_battery_pdata = { #if defined(CONFIG_TARGET_LOCALE_KOR) || defined(CONFIG_MACH_M0_CTC) .abstimer_charge_duration = 8 * 60 * 60, + .abstimer_charge_duration_wpc = 8 * 60 * 60, .abstimer_recharge_duration = 2 * 60 * 60, #else .abstimer_charge_duration = 6 * 60 * 60, + .abstimer_charge_duration_wpc = 8 * 60 * 60, .abstimer_recharge_duration = 1.5 * 60 * 60, #endif @@ -2032,6 +2034,9 @@ static void __init exynos4_reserve_mem(void) { .name = "fimc0", .size = CONFIG_VIDEO_SAMSUNG_MEMSIZE_FIMC0 * SZ_1K, + { + .alignment = 1 << 20, + }, .start = 0 }, #endif @@ -2180,7 +2185,8 @@ static void __init exynos4_reserve_mem(void) "s5p-smem/mfc=mfc-secure;" "s5p-smem/fimc=ion;" "s5p-smem/mfc-shm=mfc-normal;" - "s5p-smem/fimd=fimd;"; + "s5p-smem/fimd=fimd;" + "s5p-smem/fimc0=fimc0"; s5p_cma_region_reserve(regions, regions_secure, 0, map); } @@ -2743,13 +2749,8 @@ static void __init midas_machine_init(void) /* 400 kHz for initialization of MMC Card */ __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS3) & 0xfffffff0) | 0x9, EXYNOS4_CLKDIV_FSYS3); -#if defined(CONFIG_MACH_M0) && defined(CONFIG_TARGET_LOCALE_EUR) - __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS2) & 0x00f0fff0) - | 0x10008, EXYNOS4_CLKDIV_FSYS2); -#else __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS2) & 0xfff0fff0) | 0x80008, EXYNOS4_CLKDIV_FSYS2); -#endif __raw_writel((__raw_readl(EXYNOS4_CLKDIV_FSYS1) & 0xfff0fff0) | 0x80008, EXYNOS4_CLKDIV_FSYS1); } diff --git a/arch/arm/mach-exynos/mach-px.c b/arch/arm/mach-exynos/mach-px.c index 8ab8c7ad490..b4cc19c3e1f 100644 --- a/arch/arm/mach-exynos/mach-px.c +++ b/arch/arm/mach-exynos/mach-px.c @@ -32,6 +32,9 @@ #include <linux/sensor/k3g.h> #include <linux/sensor/k3dh.h> #include <linux/sensor/ak8975.h> +#if defined(CONFIG_MACH_P8LTE) +#include <linux/platform_data/lte_modem_bootloader.h> +#endif #include <linux/sensor/cm3663.h> #include <linux/pn544.h> #ifdef CONFIG_SND_SOC_U1_MC1N2 @@ -106,6 +109,9 @@ #include <mach/dev.h> #include <mach/regs-clock.h> #include <mach/exynos-ion.h> +#if defined(CONFIG_MACH_P8LTE) +#include <mach/gpio.h> +#endif #ifdef CONFIG_FB_S5P_MIPI_DSIM #include <mach/mipi_ddi.h> @@ -286,6 +292,39 @@ static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = { #ifdef CONFIG_MACH_PX +#ifdef CONFIG_SEC_MODEM_P8LTE +#define LTE_MODEM_SPI_BUS_NUM 0 +#define LTE_MODEM_SPI_CS 0 +#define LTE_MODEM_SPI_MAX_CLK (500*1000) +struct lte_modem_bootloader_platform_data lte_modem_bootloader_pdata = { + .name = "lte_modem_int", + .gpio_lte2ap_status = GPIO_LTE2AP_STATUS, +}; +/*struct lte_modem_bootloader_platform_data lte_modem_bootloader_pdata = { + .name = "lte_modem_bootloader", + .gpio_lte2ap_status = GPIO_LTE2AP_STATUS, + .gpio_lte_active = GPIO_LTE_ACTIVE, +};*/ + +static struct s3c64xx_spi_csinfo spi0_csi_lte[] = { + [0] = { + .line = EXYNOS4_GPB(1), /*S5PV310_GPB(1),*/ + .set_level = gpio_set_value, + }, +}; + +static struct spi_board_info spi0_board_info_lte[] __initdata = { + { + .modalias = "lte_modem_spi", + .platform_data = <e_modem_bootloader_pdata, + .max_speed_hz = LTE_MODEM_SPI_MAX_CLK, + .bus_num = LTE_MODEM_SPI_BUS_NUM, + .chip_select = LTE_MODEM_SPI_CS, + .mode = SPI_MODE_0, + .controller_data = &spi0_csi_lte[0], + } +}; +#endif static struct platform_device p4w_wlan_ar6000_pm_device = { .name = "wlan_ar6000_pm_dev", .id = 1, @@ -1983,7 +2022,7 @@ ssize_t front_camera_type_show(struct device *dev, struct device_attribute *attr, char *buf) { /* Change camera type properly */ -#ifdef CONFIG_MACH_P8 +#if defined(CONFIG_MACH_P8) || defined(CONFIG_MACH_P8LTE) char cam_type[] = "SLSI_S5K5BAFX"; #else char cam_type[] = "SILICONFILE_SR200PC20"; @@ -2147,7 +2186,9 @@ static struct s3c_sdhci_platdata exynos4_hsmmc3_pdata __initdata = { .cd_type = S3C_SDHCI_CD_EXTERNAL, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, .host_caps = MMC_CAP_4_BIT_DATA, +#if defined(CONFIG_MACH_P8LTE) .pm_flags = S3C_SDHCI_PM_IGNORE_SUSPEND_RESUME, +#endif #ifdef CONFIG_MACH_PX .ext_cd_init = register_wlan_status_notify, .ext_pdev = register_wlan_pdev @@ -2470,7 +2511,6 @@ static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = { .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, }; #endif - #ifdef CONFIG_S3C64XX_DEV_SPI0 static struct s3c64xx_spi_csinfo spi0_csi[] = { [0] = { @@ -2492,7 +2532,6 @@ static struct spi_board_info spi0_board_info[] __initdata = { } }; #endif - #ifdef CONFIG_FB_S5P #ifdef CONFIG_FB_S5P_AMS369FG06 @@ -3265,7 +3304,7 @@ static void u1_sound_init(void) #endif /* IR_LED */ -#ifdef CONFIG_IR_REMOCON +#ifdef CONFIG_IR_REMOCON_GPIO static struct platform_device ir_remote_device = { .name = "ir_rc", @@ -3291,7 +3330,7 @@ static void ir_rc_init_hw(void) gpio_set_value(GPIO_IRDA_nINT, 0); s3c_gpio_cfgpin(GPIO_IRDA_EN, S3C_GPIO_OUTPUT); - S3C_gpio_setpull(GPIO_IRDA_EN, S3C_GPIO_PULL_NONE); + s3c_gpio_setpull(GPIO_IRDA_EN, S3C_GPIO_PULL_NONE); gpio_set_value(GPIO_IRDA_EN, 0); } #endif @@ -4224,10 +4263,10 @@ static void ts_read_ta_status(bool *ta_status) #define MXT768E_MAX_MT_FINGERS 10 #define MXT768E_CHRGTIME_BATT 64 #define MXT768E_CHRGTIME_CHRG 64 -#define MXT768E_THRESHOLD_BATT 50 -#define MXT768E_THRESHOLD_CHRG 48 -#define MXT768E_CALCFG_BATT 210 -#define MXT768E_CALCFG_CHRG 242 +#define MXT768E_THRESHOLD_BATT 30 +#define MXT768E_THRESHOLD_CHRG 40 +#define MXT768E_CALCFG_BATT 242 +#define MXT768E_CALCFG_CHRG 114 #define MXT768E_ATCHCALSTHR_NORMAL 50 #define MXT768E_ATCHFRCCALTHR_NORMAL 50 @@ -4235,12 +4274,12 @@ static void ts_read_ta_status(bool *ta_status) #define MXT768E_ATCHFRCCALTHR_WAKEUP 8 #define MXT768E_ATCHFRCCALRATIO_WAKEUP 136 -#define MXT768E_IDLESYNCSPERX_BATT 38 -#define MXT768E_IDLESYNCSPERX_CHRG 40 -#define MXT768E_ACTVSYNCSPERX_BATT 38 -#define MXT768E_ACTVSYNCSPERX_CHRG 40 +#define MXT768E_IDLESYNCSPERX_BATT 21 +#define MXT768E_IDLESYNCSPERX_CHRG 38 +#define MXT768E_ACTVSYNCSPERX_BATT 21 +#define MXT768E_ACTVSYNCSPERX_CHRG 38 -#define MXT768E_IDLEACQINT_BATT 24 +#define MXT768E_IDLEACQINT_BATT 255 #define MXT768E_IDLEACQINT_CHRG 24 #define MXT768E_ACTACQINT_BATT 255 #define MXT768E_ACTACQINT_CHRG 255 @@ -4324,10 +4363,10 @@ static u8 t47_config_e[] = { PROCI_STYLUS_T47, }; static u8 t48_config_e[] = {PROCG_NOISESUPPRESSION_T48, - 3, 0, MXT768E_CALCFG_BATT, 0, 0, 0, 0, 0, 0, 0, - 176, 15, 0, 6, 6, 0, 0, 48, 4, 64, - 0, 0, 20, 0, 0, 0, 0, 15, 0, 0, - 0, 0, 0, 0, 112, MXT768E_THRESHOLD_CHRG, 2, 16, 2, 80, + 3, 0, MXT768E_CALCFG_BATT, 60, 0, 0, 0, 0, 0, 0, + 112, 15, 0, 6, 6, 0, 0, 48, 4, 64, + 0, 0, 9, 0, 0, 0, 0, 5, 0, 0, + 0, 0, 0, 0, 112, MXT768E_THRESHOLD_BATT, 2, 16, 2, 81, MXT768E_MAX_MT_FINGERS, 20, 40, 250, 250, 5, 5, 143, 50, 136, 30, 12, MXT768E_TCHHYST_CHRG, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -4335,10 +4374,10 @@ static u8 t48_config_e[] = {PROCG_NOISESUPPRESSION_T48, }; static u8 t48_config_chrg_e[] = {PROCG_NOISESUPPRESSION_T48, - 3, 0, MXT768E_CALCFG_CHRG, 0, 0, 0, 0, 0, 0, 0, - 112, 15, 0, 6, 6, 0, 0, 44, 4, 64, + 3, 0, MXT768E_CALCFG_CHRG, 15, 0, 0, 0, 0, 3, 5, + 96, 20, 0, 6, 6, 0, 0, 48, 4, 64, 0, 0, 20, 0, 0, 0, 0, 15, 0, 0, - 0, 0, 0, 0, 112, MXT768E_THRESHOLD_CHRG, 2, 16, 8, 80, + 0, 0, 0, 0, 96, MXT768E_THRESHOLD_CHRG, 2, 10, 5, 81, MXT768E_MAX_MT_FINGERS, 20, 40, 251, 251, 6, 6, 144, 50, 136, 30, 12, MXT768E_TCHHYST_CHRG, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -5451,23 +5490,20 @@ static struct s3cfb_lcd s6f1202a = { static int lcd_power_on(struct lcd_device *ld, int enable) { if (enable) { - gpio_set_value(GPIO_LCD_EN, GPIO_LEVEL_HIGH); - mdelay(10); - gpio_set_value(GPIO_LCD_LDO_EN, GPIO_LEVEL_HIGH); - msleep(30); /* LVDS_N_SHDN to high*/ gpio_set_value(GPIO_LVDS_NSHDN, GPIO_LEVEL_HIGH); - msleep(300); + if (lcdtype == 2) /* BOE_NT51008 */ + msleep(200); + else /* HYDIS_NT51008 & SMD_S6F1202A02 */ + msleep(300); + } else { /* For backlight hw spec timming(T4) */ msleep(220); + /* LVDS_nSHDN low*/ gpio_set_value(GPIO_LVDS_NSHDN, GPIO_LEVEL_LOW); msleep(20); - /* Disable LVDS Panel Power, 1.2, 1.8, display 3.3V */ - gpio_set_value(GPIO_LCD_LDO_EN, GPIO_LEVEL_LOW); - gpio_set_value(GPIO_LCD_EN, GPIO_LEVEL_LOW); - msleep(300); } return 0; } @@ -5834,9 +5870,6 @@ static void __init mipi_fb_init(void) printk(KERN_INFO "%s :: fb_platform_data.hw_ver = 0x%x\n", __func__, fb_platform_data.hw_ver); - fb_platform_data.mipi_is_enabled = 1; - fb_platform_data.interface_mode = FIMD_CPU_INTERFACE; - dsim_pd = (struct s5p_platform_dsim *) s5p_device_dsim.dev.platform_data; @@ -5976,17 +6009,20 @@ static void __init smdkc210_usbgadget_init(void) pdata->phy_tune_mask |= 0xf; pdata->phy_tune |= 0xb; +#if defined(CONFIG_MACH_P8LTE) + /* squelch threshold tune [13:11] (001 : +10%) */ + pdata->phy_tune_mask |= 0x7 << 11; + pdata->phy_tune |= 0x1 << 11; +#elif defined(CONFIG_TARGET_LOCALE_P2EUR_TEMP) + /* P2 EUR OPEN */ + /*squelch threshold tune [13:11] (000 : +15%) */ + pdata->phy_tune_mask |= 0x7 << 11; + pdata->phy_tune |= 0x0 << 11; +#endif printk(KERN_DEBUG "usb: %s tune_mask=0x%x, tune=0x%x\n", __func__, pdata->phy_tune_mask, pdata->phy_tune); } -#if defined(CONFIG_MACH_P8LTE) - /* squelch threshold tune [13:11] (001 : +10%) */ - pdata->phy_tune_mask |= 0x7 << 11; - pdata->phy_tune |= 0x1 << 11; - printk(KERN_DEBUG "usb: %s apply squelch threshold tune tune_mask=0x%x, tune=0x%x\n", - __func__, pdata->phy_tune_mask, pdata->phy_tune); -#endif } #endif @@ -6271,8 +6307,9 @@ void smdk_accessory_power(u8 token, bool active) #elif defined(CONFIG_MACH_P8LTE) if (system_rev >= 2) gpio_acc_5v = GPIO_ACCESSORY_OUT_5V; -#elif defined(CONFIG_MACH_P8) /* for checking p8 3g and wifi */ - if (system_rev >= 4) + /*for checking p8 3g and wifi*/ +#elif defined(CONFIG_MACH_P8) || defined(CONFIG_MACH_P8LTE) +if (system_rev >= 4) gpio_acc_5v = GPIO_ACCESSORY_OUT_5V; #endif @@ -6460,6 +6497,13 @@ static void px_usb_otg_en(int active) } #endif +#ifdef CONFIG_INTERNAL_MODEM_IF +struct platform_device sec_idpram_pm_device = { + .name = "idparam_pm", + .id = -1, +}; +#endif + struct acc_con_platform_data acc_con_pdata = { .otg_en = px_usb_otg_en, .acc_power = smdk_accessory_power, @@ -6519,6 +6563,11 @@ static struct platform_device *smdkc210_devices[] __initdata = { &pmem_device, &pmem_gpu1_device, #endif + +#ifdef CONFIG_INTERNAL_MODEM_IF + &sec_idpram_pm_device, +#endif + #ifdef CONFIG_FB_S5P &s3c_device_fb, #endif @@ -6742,7 +6791,7 @@ static struct platform_device *smdkc210_devices[] __initdata = { #if (defined(CONFIG_30PIN_CONN) && defined(CONFIG_USB_HOST_NOTIFY)) &host_notifier_device, #endif -#if defined(CONFIG_IR_REMOCON) +#if defined(CONFIG_IR_REMOCON_GPIO) /* IR_LED */ &ir_remote_device, /* IR_LED */ @@ -7097,7 +7146,7 @@ static void __init universal_tsp_init(void) gpio_export(gpio, 0); #endif -#if defined(CONFIG_MACH_P8) +#if defined(CONFIG_MACH_P8) || defined(CONFIG_MACH_P8LTE) /* TSP_INT: XMDMADDR_7 */ gpio = GPIO_TSP_INT_18V; gpio_request(gpio, "TSP_INT_18V"); @@ -7107,6 +7156,11 @@ static void __init universal_tsp_init(void) #endif s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); + +#if defined(CONFIG_MACH_P8LTE) +s5p_register_gpio_interrupt(gpio); +#endif + #if defined(CONFIG_TOUCHSCREEN_MXT1386) \ && defined(CONFIG_RMI4_I2C) i2c_devs3_mxt[0].irq = gpio_to_irq(gpio); @@ -7163,6 +7217,9 @@ static void __init smdkc210_machine_init(void) #elif defined(CONFIG_MACH_P8) p8_config_gpio_table(); exynos4_sleep_gpio_table_set = p8_config_sleep_gpio_table; +#elif defined(CONFIG_MACH_P8LTE) + p8lte_config_gpio_table(); + exynos4_sleep_gpio_table_set = p8lte_config_sleep_gpio_table; #else /* CONFIG_MACH_P4 */ p4_config_gpio_table(); exynos4_sleep_gpio_table_set = p4_config_sleep_gpio_table; @@ -7461,6 +7518,11 @@ static void __init smdkc210_machine_init(void) s5p_device_fimg2d.dev.parent = &exynos4_device_pd[PD_LCD0].dev; #endif #endif +#ifdef CONFIG_SEC_MODEM_P8LTE + spi_register_board_info(spi0_board_info_lte, ARRAY_SIZE(spi0_board_info_lte)); + modem_p8ltevzw_init(); +#endif + #ifdef CONFIG_USB_EHCI_S5P smdkc210_ehci_init(); #endif @@ -7535,7 +7597,7 @@ static void __init smdkc210_machine_init(void) #endif cam_init(); -#if defined(CONFIG_IR_REMOCON) +#if defined(CONFIG_IR_REMOCON_GPIO) /* IR_LED */ ir_rc_init_hw(); /* IR_LED */ diff --git a/arch/arm/mach-exynos/mach-u1.c b/arch/arm/mach-exynos/mach-u1.c index 9c026e0dc6e..e0871f6a303 100644 --- a/arch/arm/mach-exynos/mach-u1.c +++ b/arch/arm/mach-exynos/mach-u1.c @@ -6372,9 +6372,6 @@ static void __init mipi_fb_init(void) printk(KERN_INFO "%s :: fb_platform_data.hw_ver = 0x%x\n", __func__, fb_platform_data.hw_ver); - fb_platform_data.mipi_is_enabled = 1; - fb_platform_data.interface_mode = FIMD_CPU_INTERFACE; - dsim_pd = (struct s5p_platform_dsim *) s5p_device_dsim.dev.platform_data; diff --git a/arch/arm/mach-exynos/mach-u1cam.c b/arch/arm/mach-exynos/mach-u1cam.c index b5ddf3b7558..c589751bd70 100644 --- a/arch/arm/mach-exynos/mach-u1cam.c +++ b/arch/arm/mach-exynos/mach-u1cam.c @@ -5886,9 +5886,6 @@ static void __init mipi_fb_init(void) printk(KERN_INFO "%s :: fb_platform_data.hw_ver = 0x%x\n", __func__, fb_platform_data.hw_ver); - fb_platform_data.mipi_is_enabled = 1; - fb_platform_data.interface_mode = FIMD_CPU_INTERFACE; - dsim_pd = (struct s5p_platform_dsim *) s5p_device_dsim.dev.platform_data; diff --git a/arch/arm/mach-exynos/midas-camera.c b/arch/arm/mach-exynos/midas-camera.c index 587a9beeafa..d1208086cbd 100644 --- a/arch/arm/mach-exynos/midas-camera.c +++ b/arch/arm/mach-exynos/midas-camera.c @@ -368,6 +368,10 @@ static int s5k6a3_power_on(void) } CAM_CHECK_ERR_RET(ret, "cfg mclk"); + /* VT_RESET */ + ret = gpio_direction_output(GPIO_CAM_VT_nRST, 1); + CAM_CHECK_ERR_RET(ret, "output GPIO_CAM_VT_nRST"); + /* VT_CORE_1.8V */ regulator = regulator_get(NULL, "vt_cam_1.8v"); if (IS_ERR(regulator)) @@ -375,19 +379,6 @@ static int s5k6a3_power_on(void) ret = regulator_enable(regulator); regulator_put(regulator); CAM_CHECK_ERR_RET(ret, "enable vt_cam_1.8v"); - udelay(1000); - - /* VT_RESET */ - ret = gpio_direction_output(GPIO_CAM_VT_nRST, 1); - CAM_CHECK_ERR_RET(ret, "output GPIO_CAM_VT_nRST"); - udelay(600); - - ret = gpio_direction_output(GPIO_CAM_VT_nRST, 0); - CAM_CHECK_ERR_RET(ret, "output GPIO_CAM_VT_nRST"); - udelay(600); - - ret = gpio_direction_output(GPIO_CAM_VT_nRST, 1); - CAM_CHECK_ERR_RET(ret, "output GPIO_CAM_VT_nRST"); gpio_free(GPIO_CAM_IO_EN); gpio_free(GPIO_CAM_VT_nRST); @@ -943,6 +934,7 @@ static struct s5c73m3_platform_data s5c73m3_plat = { .set_vdd_core = s5c73m3_set_vdd_core, .is_vdd_core_set = s5c73m3_is_vdd_core_set, .is_isp_reset = s5c73m3_is_isp_reset, + .power_on_off = s5c73m3_power, }; static struct i2c_board_info s5c73m3_i2c_info = { diff --git a/arch/arm/mach-exynos/midas-gpio.c b/arch/arm/mach-exynos/midas-gpio.c index cb69a05aeb5..ff7d99ecb29 100644 --- a/arch/arm/mach-exynos/midas-gpio.c +++ b/arch/arm/mach-exynos/midas-gpio.c @@ -787,6 +787,13 @@ static struct gpio_init_data m0_init_gpios[] = { S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV3}, /* CAM_MCLK */ {EXYNOS4212_GPM2(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV3}, /* VTCAM_MCLK */ + + {EXYNOS4_GPK2(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_ZERO, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV4}, /* SD_CLK */ + {EXYNOS4_GPK2(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_ZERO, + S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV4}, /* SD_CMD */ + {EXYNOS4_GPK2(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_ZERO, + S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV4}, /* SD_nCD(NC) */ }; /* diff --git a/arch/arm/mach-exynos/midas-lcd.c b/arch/arm/mach-exynos/midas-lcd.c index 549a742c1a4..68125e2da29 100644 --- a/arch/arm/mach-exynos/midas-lcd.c +++ b/arch/arm/mach-exynos/midas-lcd.c @@ -232,11 +232,7 @@ static struct lcd_platform_data ld9040_platform_data = { .gpio_cfg_earlysuspend = lcd_gpio_cfg_earlysuspend, .gpio_cfg_lateresume = lcd_gpio_cfg_lateresume, /* it indicates whether lcd panel is enabled from u-boot. */ -#if defined(CONFIG_MACH_S2PLUS) - .lcd_enabled = 1, -#else .lcd_enabled = 0, -#endif .reset_delay = 20, /* 20ms */ .power_on_delay = 20, /* 20ms */ .power_off_delay = 200, /* 200ms */ @@ -467,9 +463,14 @@ static struct platform_device s3c_device_spi_gpio = { /* for Geminus based on MIPI-DSI interface */ static struct s3cfb_lcd s6e8aa0 = { .name = "s6e8aa0", - .width = 720, .height = 1280, +#if defined(CONFIG_S6E8AA0_AMS529HA01) + .width = 800, + .p_width = 64, +#else + .width = 720, .p_width = 60, /* 59.76 mm */ +#endif .p_height = 106, /* 106.24 mm */ .bpp = 24, @@ -505,6 +506,48 @@ static struct s3cfb_lcd s6e8aa0 = { }; #endif +#ifdef CONFIG_FB_S5P_S6E63M0 +/* for Geminus based on MIPI-DSI interface */ +static struct s3cfb_lcd s6e63m0 = { + .name = "s6e63m0", + .width = 480, + .height = 800, + .p_width = 60, /* 59.76 mm */ + .p_height = 106, /* 106.24 mm */ + .bpp = 24, + + .freq = 56, + + /* minumun value is 0 except for wr_act time. */ + .cpu_timing = { + .cs_setup = 0, + .wr_setup = 0, + .wr_act = 1, + .wr_hold = 0, + }, + + .timing = { + .h_fp = 16, + .h_bp = 14, + .h_sw = 2, + .v_fp = 28, + .v_fpe = 1, + .v_bp = 1, + .v_bpe = 1, + .v_sw = 2, + .cmd_allow_len = 11, /* v_fp=stable_vfp + cmd_allow_len */ + .stable_vfp = 2, + }, + + .polarity = { + .rise_vclk = 1, + .inv_hsync = 0, + .inv_vsync = 0, + .inv_vden = 0, + }, +}; +#endif + #ifdef CONFIG_FB_S5P_S6E39A0 static struct s3cfb_lcd s6e39a0 = { .name = "s6e8aa0", @@ -727,9 +770,6 @@ void __init mipi_fb_init(void) printk(KERN_INFO "%s :: fb_platform_data.hw_ver = 0x%x\n", __func__, fb_platform_data.hw_ver); - fb_platform_data.mipi_is_enabled = 1; - fb_platform_data.interface_mode = FIMD_CPU_INTERFACE; - dsim_pd = (struct s5p_platform_dsim *) s5p_device_dsim.dev.platform_data; @@ -745,10 +785,19 @@ void __init mipi_fb_init(void) dsim_lcd_info->lcd_panel_info = (void *)&s6d6aa1; #endif +#ifdef CONFIG_FB_S5P_S6E63M0 + dsim_lcd_info->lcd_panel_info = (void *)&s6e63m0; + dsim_pd->dsim_info->e_no_data_lane = DSIM_DATA_LANE_2; + /* 320Mbps */ + dsim_pd->dsim_info->p = 3; + dsim_pd->dsim_info->m = 80; + dsim_pd->dsim_info->s = 1; +#else /* 500Mbps */ dsim_pd->dsim_info->p = 3; dsim_pd->dsim_info->m = 125; dsim_pd->dsim_info->s = 1; +#endif mipi_ddi_pd = (struct mipi_ddi_platform_data *) dsim_lcd_info->mipi_ddi_pd; @@ -775,6 +824,9 @@ struct s3c_platform_fb fb_platform_data __initdata = { #if defined(CONFIG_FB_S5P_S6E8AA0) .lcd = &s6e8aa0 #endif +#if defined(CONFIG_FB_S5P_S6E63M0) + .lcd = &s6e63m0 +#endif #if defined(CONFIG_FB_S5P_S6E39A0) .lcd = &s6e39a0 #endif @@ -798,6 +850,13 @@ static struct platform_mdnie_data mdnie_data = { }; #endif +#if defined(CONFIG_FB_S5P_S6C1372) +void check_lcd_type(void) +{ + mdnie_data.display_type = lcdtype; +} +#endif + struct platform_device mdnie_device = { .name = "mdnie", .id = -1, diff --git a/arch/arm/mach-exynos/midas-tsp.c b/arch/arm/mach-exynos/midas-tsp.c index e3361c62aba..75e54d0376c 100644 --- a/arch/arm/mach-exynos/midas-tsp.c +++ b/arch/arm/mach-exynos/midas-tsp.c @@ -806,22 +806,10 @@ int melfas_power(int on) printk(KERN_DEBUG "[TSP] %s %s\n", __func__, on ? "on" : "off"); if (on) { + /* Analog-Panel Power */ regulator_enable(regulator); -#if defined(GPIO_OLED_DET) -#if defined(CONFIG_MACH_SLP_PQ) - if (system_rev != 0x3) /* M0_P_Rev0.0 */ -#endif - { /*TODO: will remove after divide regulator */ - ret = gpio_request(GPIO_OLED_DET, "OLED_DET"); - if (ret) - pr_err("failed to request gpio(OLED_DET)\n"); - s3c_gpio_setpull(GPIO_OLED_DET, S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(GPIO_OLED_DET, S3C_GPIO_SFN(0xf)); - gpio_free(GPIO_OLED_DET); - - TSP_VDD_18V(1); - } -#endif + /* IO Logit Power */ + TSP_VDD_18V(1); } else { /* * TODO: If there is a case the regulator must be disabled @@ -829,25 +817,7 @@ int melfas_power(int on) */ if (regulator_is_enabled(regulator)) { regulator_disable(regulator); -#if defined(GPIO_OLED_DET) -#if defined(CONFIG_MACH_SLP_PQ) - if (system_rev != 0x3) /* M0_P_Rev0.0 */ -#endif - { /*TODO: will remove after divide regulator */ - ret = gpio_request(GPIO_OLED_DET, "OLED_DET"); - if (ret) - pr_err - ("failed to request gpio(OLED_DET)\n"); - s3c_gpio_cfgpin(GPIO_OLED_DET, S3C_GPIO_OUTPUT); - s3c_gpio_setpull(GPIO_OLED_DET, - S3C_GPIO_PULL_NONE); - gpio_direction_output(GPIO_OLED_DET, - GPIO_LEVEL_LOW); - gpio_free(GPIO_OLED_DET); - - TSP_VDD_18V(0); - } -#endif + TSP_VDD_18V(0); } } diff --git a/arch/arm/mach-exynos/secmem-allocdev.c b/arch/arm/mach-exynos/secmem-allocdev.c index ce0b3d42c22..1e68e9c58f5 100644 --- a/arch/arm/mach-exynos/secmem-allocdev.c +++ b/arch/arm/mach-exynos/secmem-allocdev.c @@ -279,6 +279,26 @@ static long secmem_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) *(uint32_t *)(mfc_shm_virtaddr + 0xC) = MFC_SEC_MAGIC_CHUNK3; break; } + + case SECMEM_IOC_TEXT_CHUNKINFO: + { + struct cma_info info; + struct secchunk_info minfo; + + if (cma_info(&info, secmem.this_device, "fimc0")) + return -EINVAL; + + minfo.base = info.lower_bound; + minfo.size = info.total_size; + + printk("[minfo base] : 0x%x", minfo.base); + printk("[minfo size] : 0x%x", minfo.size); + + if (copy_to_user((void __user *)arg, &minfo, sizeof(minfo))) + return -EFAULT; + break; + } + default: return -ENOTTY; } diff --git a/arch/arm/mach-exynos/setup-dsim.c b/arch/arm/mach-exynos/setup-dsim.c index e1ba8eeafbd..6d102f1bad1 100644 --- a/arch/arm/mach-exynos/setup-dsim.c +++ b/arch/arm/mach-exynos/setup-dsim.c @@ -81,40 +81,3 @@ void s5p_dsim_exit_d_phy(unsigned int dsim_base) s5p_dsim_enable_d_phy(0); } -static void exynos4_dsim_setup_24bpp(unsigned int start, unsigned int size, - unsigned int cfg, s5p_gpio_drvstr_t drvstr) -{ - s3c_gpio_cfgrange_nopull(start, size, cfg); - - for (; size > 0; size--, start++) - s5p_gpio_set_drvstr(start, drvstr); -} - -void exynos4_dsim_gpio_setup_24bpp(void) -{ - unsigned int reg = 0; - - /* - * Set DISPLAY_CONTROL register for Display path selection. - * - * DISPLAY_CONTROL[1:0] - * --------------------- - * 00 | MIE - * 01 | MDINE - * 10 | FIMD : selected - * 11 | FIMD - */ -#ifdef CONFIG_FB_S5P_MDNIE - reg = __raw_readl(S3C_VA_SYS + 0x0210); - reg &= ~(1<<13); - reg &= ~(1<<12); - reg &= ~(3<<10); - reg |= (1<<0); - reg &= ~(1<<1); - __raw_writel(reg, S3C_VA_SYS + 0x0210); -#else - reg = __raw_readl(S3C_VA_SYS + 0x0210); - reg |= (1 << 1); - __raw_writel(reg, S3C_VA_SYS + 0x0210); -#endif -} diff --git a/arch/arm/mach-exynos/setup-fb-s5p.c b/arch/arm/mach-exynos/setup-fb-s5p.c index 21b21994b80..314e21a9f7c 100644 --- a/arch/arm/mach-exynos/setup-fb-s5p.c +++ b/arch/arm/mach-exynos/setup-fb-s5p.c @@ -36,17 +36,10 @@ struct platform_device; /* don't need the contents */ #ifdef CONFIG_FB_S5P -#if !defined(CONFIG_FB_S5P_MIPI_DSIM) -static void s3cfb_gpio_setup_24bpp(unsigned int start, unsigned int size, - unsigned int cfg, s5p_gpio_drvstr_t drvstr) + +void s3cfb_set_display_path(void) { u32 reg; - - s3c_gpio_cfgrange_nopull(start, size, cfg); - - for (; size > 0; size--, start++) - s5p_gpio_set_drvstr(start, drvstr); - #ifdef CONFIG_FB_S5P_MDNIE reg = __raw_readl(S3C_VA_SYS + 0x0210); reg &= ~(1<<13); @@ -61,6 +54,16 @@ static void s3cfb_gpio_setup_24bpp(unsigned int start, unsigned int size, __raw_writel(reg, S3C_VA_SYS + 0x0210); #endif } + +#if !defined(CONFIG_FB_S5P_MIPI_DSIM) +static void s3cfb_gpio_setup_24bpp(unsigned int start, unsigned int size, + unsigned int cfg, s5p_gpio_drvstr_t drvstr) +{ + s3c_gpio_cfgrange_nopull(start, size, cfg); + + for (; size > 0; size--, start++) + s5p_gpio_set_drvstr(start, drvstr); +} #endif #if defined(CONFIG_FB_S5P_WA101S) || defined(CONFIG_FB_S5P_LTE480WV) @@ -95,7 +98,7 @@ void s3cfb_cfg_gpio(struct platform_device *pdev) s3cfb_gpio_setup_24bpp(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1); s3cfb_gpio_setup_24bpp(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1); } -#elif defined(CONFIG_FB_S5P_LD9040) || defined(CONFIG_FB_S5P_S6C1372) || defined(CONFIG_FB_S5P_S6F1202A) +#elif defined(CONFIG_FB_S5P_LD9040) || defined(CONFIG_FB_S5P_S6F1202A) void s3cfb_cfg_gpio(struct platform_device *pdev) { s3cfb_gpio_setup_24bpp(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4); @@ -103,26 +106,19 @@ void s3cfb_cfg_gpio(struct platform_device *pdev) s3cfb_gpio_setup_24bpp(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4); s3cfb_gpio_setup_24bpp(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4); } -#else +#elif defined(CONFIG_FB_S5P_S6C1372) void s3cfb_cfg_gpio(struct platform_device *pdev) { - u32 reg; - -#ifdef CONFIG_FB_S5P_MDNIE - reg = __raw_readl(S3C_VA_SYS + 0x0210); - reg &= ~(1<<13); - reg &= ~(1<<12); - reg &= ~(3<<10); - reg |= (1<<0); - reg &= ~(1<<1); - __raw_writel(reg, S3C_VA_SYS + 0x0210); + s3cfb_gpio_setup_24bpp(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2); + s3cfb_gpio_setup_24bpp(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2); + s3cfb_gpio_setup_24bpp(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2); + s3cfb_gpio_setup_24bpp(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2); +} #else - reg = __raw_readl(S3C_VA_SYS + 0x0210); - reg |= (1<<1); - __raw_writel(reg, S3C_VA_SYS + 0x0210); -#endif - - return; +void s3cfb_cfg_gpio(struct platform_device *pdev) +{ + /* do not modify this #else function, + if you want another rgb gpio configuration plz add another one */ } #endif #endif @@ -169,6 +165,7 @@ int s3cfb_lcd_off(struct platform_device *pdev) { return 0; } + #elif defined(CONFIG_FB_S5P_LTE480WV) int s3cfb_backlight_on(struct platform_device *pdev) { @@ -735,9 +732,7 @@ unsigned int get_clk_rate(struct platform_device *pdev, struct clk *sclk) struct s3cfb_lcd *lcd = (struct s3cfb_lcd *)pdata->lcd; struct s3cfb_lcd_timing *timing = &lcd->timing; u32 src_clk, vclk, div, rate; -#if defined(CONFIG_MACH_MIDAS) && defined(CONFIG_FB_S5P_S6E8AA0) u32 vclk_limit, div_limit, fimd_div; -#endif src_clk = clk_get_rate(sclk); @@ -750,7 +745,6 @@ unsigned int get_clk_rate(struct platform_device *pdev, struct clk *sclk) div = DIV_ROUND_CLOSEST(src_clk, vclk); -#if defined(CONFIG_MACH_MIDAS) && defined(CONFIG_FB_S5P_S6E8AA0) vclk_limit = (40 * (timing->h_bp + timing->h_fp + timing->h_sw + lcd->width) * (timing->v_bp + timing->v_fp + timing->v_sw + lcd->height)); @@ -759,6 +753,7 @@ unsigned int get_clk_rate(struct platform_device *pdev, struct clk *sclk) fimd_div = gcd(div, div_limit); +#if defined(CONFIG_MACH_MIDAS) && defined(CONFIG_FB_S5P_S6E8AA0) && !defined(CONFIG_S6E8AA0_AMS529HA01) div /= fimd_div; #endif diff --git a/arch/arm/mach-exynos/setup-mshci-gpio.c b/arch/arm/mach-exynos/setup-mshci-gpio.c index 4c733100339..db7d86ad67f 100644 --- a/arch/arm/mach-exynos/setup-mshci-gpio.c +++ b/arch/arm/mach-exynos/setup-mshci-gpio.c @@ -32,15 +32,6 @@ #define DIV_FSYS3 (S5P_VA_CMU + 0x0C54C) -#if defined(CONFIG_MACH_M0) && defined(CONFIG_TARGET_LOCALE_EUR) -#define EPLL_CON0_F (S5P_VA_CMU + 0x0C110) - -void print_epll_con0(void) -{ - pr_info("EPLL_CON0 : 0x%x\n",__raw_readl(EPLL_CON0_F)); -} -#endif - void exynos4_setup_mshci_cfg_gpio(struct platform_device *dev, int width) { unsigned int gpio; diff --git a/arch/arm/mach-exynos/setup-sdhci-gpio.c b/arch/arm/mach-exynos/setup-sdhci-gpio.c index 1973e798281..09b0818d6b4 100644 --- a/arch/arm/mach-exynos/setup-sdhci-gpio.c +++ b/arch/arm/mach-exynos/setup-sdhci-gpio.c @@ -163,7 +163,7 @@ void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2); #elif defined(CONFIG_MACH_MIDAS) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); + s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2); #elif defined(CONFIG_MACH_PX) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); @@ -185,7 +185,7 @@ void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2); #elif defined(CONFIG_MACH_MIDAS) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); + s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV2); #elif defined(CONFIG_MACH_PX) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); diff --git a/arch/arm/mach-exynos/setup-sdhci.c b/arch/arm/mach-exynos/setup-sdhci.c index 7c6ea0f9da8..960028cd3a5 100644 --- a/arch/arm/mach-exynos/setup-sdhci.c +++ b/arch/arm/mach-exynos/setup-sdhci.c @@ -20,6 +20,7 @@ #include <linux/mmc/host.h> #include <plat/regs-sdhci.h> +#include <plat/sdhci.h> /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ @@ -34,6 +35,7 @@ void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, struct mmc_ios *ios, struct mmc_card *card) { u32 ctrl2, ctrl3; + struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* don't need to alter anything according to card-type */ @@ -54,6 +56,18 @@ void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, S3C_SDHCI_CTRL2_DFCNT_NONE | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); +#ifdef CONFIG_MACH_M0 + /* set 2ns delay for TX. This setting is just for wifi sdio i/f of + M0 and his brother projects. */ + if (pdata->pm_flags == S3C_SDHCI_PM_IGNORE_SUSPEND_RESUME && + (ios->clock >= 25 * 1000000)) { + /* to distinguish tflash and sdio i/f, it checks pm_flags's + value. This way only can be applied to Braodcom + wifi module. */ + ctrl2 |= S3C_SDHCI_CTRL2_ENFBCLKTX; + } +#endif + /* Tx and Rx feedback clock delay control */ if (ios->clock < 25 * 1000000) @@ -62,7 +76,10 @@ void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); else - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | + S3C_SDHCI_CTRL3_FCSEL2 | + S3C_SDHCI_CTRL3_FCSEL1 | + S3C_SDHCI_CTRL3_FCSEL0); writel(ctrl2, r + S3C_SDHCI_CONTROL2); writel(ctrl3, r + S3C_SDHCI_CONTROL3); diff --git a/arch/arm/mach-exynos/tmu.c b/arch/arm/mach-exynos/tmu.c index c39ff65cd1e..cdfd9166974 100644 --- a/arch/arm/mach-exynos/tmu.c +++ b/arch/arm/mach-exynos/tmu.c @@ -477,13 +477,15 @@ static void exynos_interrupt_enable(struct s5p_tmu_info *info, int enable) */ static int exynos_tc_volt(struct s5p_tmu_info *info, int enable) { - struct s5p_platform_tmu *data = info->dev->platform_data; + struct s5p_platform_tmu *data; static int usage; int ret = 0; if (!info) return -EPERM; + data = info->dev->platform_data; + if (enable == usage) { pr_debug("TMU: already is %s.\n", enable ? "locked" : "unlocked"); @@ -1351,11 +1353,13 @@ static int s5p_tmu_suspend(struct platform_device *pdev, pm_message_t state) static int s5p_tmu_resume(struct platform_device *pdev) { struct s5p_tmu_info *info = platform_get_drvdata(pdev); - struct s5p_platform_tmu *data = info->dev->platform_data; + struct s5p_platform_tmu *data; if (!info) return -EAGAIN; + data = info->dev->platform_data; + /* restore tmu register value */ __raw_writel(info->reg_save[0], info->tmu_base + EXYNOS4_TMU_CONTROL); __raw_writel(info->reg_save[1], diff --git a/arch/arm/plat-s5p/dev-dsim.c b/arch/arm/plat-s5p/dev-dsim.c index 0467c63dde5..850172d9274 100644 --- a/arch/arm/plat-s5p/dev-dsim.c +++ b/arch/arm/plat-s5p/dev-dsim.c @@ -36,19 +36,9 @@ static struct dsim_config dsim_info = { .e_no_data_lane = DSIM_DATA_LANE_4, .e_byte_clk = DSIM_PLL_OUT_DIV8, -#ifdef CONFIG_MACH_JENGA - .p = 3, - .m = 75, - .s = 0, -#endif - .pll_stable_time = 500, /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */ -#ifdef CONFIG_MACH_JENGA - .esc_clk = 10 * 1000000, /* escape clk : 10MHz */ -#else .esc_clk = 20 * 1000000, /* escape clk : 10MHz */ -#endif .stop_holding_cnt = 0, /* stop state holding counter after bta change count 0 ~ 0xfff */ .bta_timeout = 0xff, /* bta timeout 0 ~ 0xff */ @@ -96,7 +86,6 @@ static struct s5p_platform_dsim dsim_platform_data = { /* default platform revision is 0(evt0). */ .platform_rev = 0, - .cfg_gpio = exynos4_dsim_gpio_setup_24bpp, }; struct platform_device s5p_device_dsim = { diff --git a/arch/arm/plat-s5p/dev-fimd-s5p.c b/arch/arm/plat-s5p/dev-fimd-s5p.c index 80d0bfd7413..57b322b4863 100644 --- a/arch/arm/plat-s5p/dev-fimd-s5p.c +++ b/arch/arm/plat-s5p/dev-fimd-s5p.c @@ -89,6 +89,7 @@ void __init s3cfb_set_platdata(struct s3c_platform_fb *pd) #endif s3cfb_get_clk_name(npd->clk_name); + npd->set_display_path = s3cfb_set_display_path; npd->cfg_gpio = s3cfb_cfg_gpio; npd->backlight_on = s3cfb_backlight_on; npd->backlight_off = s3cfb_backlight_off; diff --git a/arch/arm/plat-s5p/include/plat/fb-s5p.h b/arch/arm/plat-s5p/include/plat/fb-s5p.h index 017a8b0d7da..28721c907e2 100644 --- a/arch/arm/plat-s5p/include/plat/fb-s5p.h +++ b/arch/arm/plat-s5p/include/plat/fb-s5p.h @@ -43,37 +43,7 @@ struct s3c_platform_fb { int default_win; int swap; void *lcd; -#ifdef CONFIG_FB_S5P_MIPI_DSIM - unsigned int sub_lcd_enabled; - unsigned int machine_is_cypress; - unsigned int machine_is_p1p2; - unsigned int mdnie_is_enabled; - unsigned int mipi_is_enabled; - unsigned int interface_mode; - - void *single_lcd; - void *dual_lcd; - - void (*set_display_path)(unsigned int mode); - int (*reset_lcd)(void); - - /* variables and interface for mDNIe */ - char mdnie_clk_name[20]; - void *mdnie_clk; - unsigned int mdnie_phy_base; - unsigned int ielcd_phy_base; - void __iomem *mdnie_mmio_base; - void __iomem *ielcd_mmio_base; - unsigned char mdnie_mode; - - void (*set_mdnie_clock)(void *mdnie_clk, unsigned char enable); - void (*init_mdnie)(unsigned int mdnie_base, - unsigned int hsize, unsigned int vsize); - void (*mdnie_set_mode)(unsigned int mdnie_base, unsigned char mode); - - void (*start_ielcd_logic)(unsigned int ielcd_base); - void (*init_ielcd)(unsigned int ielcd_base, void *l, void *c); -#endif + void (*set_display_path)(void); void (*cfg_gpio)(struct platform_device *dev); int (*backlight_on)(struct platform_device *dev); int (*backlight_off)(struct platform_device *dev); @@ -86,6 +56,7 @@ struct s3c_platform_fb { extern void s3cfb_set_platdata(struct s3c_platform_fb *fimd); /* defined by architecture to configure gpio */ +extern void s3cfb_set_display_path(void); extern void s3cfb_cfg_gpio(struct platform_device *pdev); extern int s3cfb_backlight_on(struct platform_device *pdev); extern int s3cfb_backlight_off(struct platform_device *pdev); diff --git a/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h b/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h index b616f2c97c6..9aaf8906b68 100644 --- a/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h +++ b/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h @@ -146,6 +146,7 @@ #define S3C_BLENDEQ3 (0x024C) /* Window 3 blending equation control */ #define S3C_BLENDEQ4 (0x0250) /* Window 4 blending equation control */ #define S3C_BLENDCON (0x0260) /* Blending control */ +#define S3C_DUALRGB (0x027C) /* DUALRGB INTERFACE SETTING REGISTER */ #define S3C_SHD_WIN_BASE (0x4000) /* Shadow Window control reg Base */ /* * Bit Definitions @@ -412,4 +413,10 @@ /* WxKEYCON1 (1~4) */ #define S3C_KEYCON1_COLVAL(x) (((x) & 0xffffff) << 0) +/* DUALRGB */ +#define S3C_DUALRGB_BYPASS_SINGLE (0 << 0) +#define S3C_DUALRGB_BYPASS_DUAL (1 << 0) +#define S3C_DUALRGB_MIE_DUAL (2 << 0) +#define S3C_DUALRGB_MDNIE (3 << 0) + #endif /* __ASM_PLAT_REGS_FB_S5P_H */ |