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authorDavid Daney <ddaney@caviumnetworks.com>2009-05-13 15:59:56 -0700
committerRalf Baechle <ralf@linux-mips.org>2009-06-17 11:06:31 +0100
commit4bb1a1089e321d685967032497f4363081eab3a9 (patch)
treeda76ef126512ac9c13bedf21c9f6e6538d860bbc /arch/mips/kernel
parentfbeda19f82aa07082d2e1607a9f5114141dae2ac (diff)
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MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h
We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove it to mach-cavium-octeon/cpu-feature-overrides.h Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/traps.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index f54871797ab..08f1edf355e 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1510,10 +1510,6 @@ void __cpuinit per_cpu_trap_init(void)
write_c0_hwrena(enable);
}
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
- write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */
-#endif
-
#ifdef CONFIG_MIPS_MT_SMTC
if (!secondaryTC) {
#endif /* CONFIG_MIPS_MT_SMTC */