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| author | Franck Bui-Huu <fbuihuu@gmail.com> | 2007-02-02 17:41:47 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-22 00:50:44 +0000 |
| commit | 9693a85378b590cc7a4aa2db2174422585c7c8c4 (patch) | |
| tree | 43d031f8e555d9276e68bdb158bd264c2d260346 /include/asm-mips/stackframe.h | |
| parent | 9654640d0af8f2de40ff3807d3695109d3463f54 (diff) | |
| download | kernel_samsung_espresso10-9693a85378b590cc7a4aa2db2174422585c7c8c4.tar.gz kernel_samsung_espresso10-9693a85378b590cc7a4aa2db2174422585c7c8c4.tar.bz2 kernel_samsung_espresso10-9693a85378b590cc7a4aa2db2174422585c7c8c4.zip | |
[MIPS] Add basic SMARTMIPS ASE support
This patch adds trivial support for SMARTMIPS extension. This extension
is currently implemented by 4KS[CD] CPUs.
Basically it saves/restores ACX register, which is part of the SMARTMIPS
ASE, when needed. This patch does *not* add any support for Smartmips MMU
features.
Futhermore this patch does not add explicit support for 4KS[CD] CPUs since
they are respectively mips32 and mips32r2 compliant. So with the current
processor configuration, a platform that has such CPUs needs to select
both configs:
CPU_HAS_SMARTMIPS
SYS_HAS_CPU_MIPS32_R[12]
This is due to the processor configuration which is mixing up all the
architecture variants and the processor types.
The drawback of this, is that we currently pass '-march=mips32' option to
gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This
can lead to a kernel image a little bit bigger than required.
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/stackframe.h')
| -rw-r--r-- | include/asm-mips/stackframe.h | 30 |
1 files changed, 24 insertions, 6 deletions
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index 1fae5dc5813..7afa1fdf70c 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -29,16 +29,25 @@ .endm .macro SAVE_TEMP +#ifdef CONFIG_CPU_HAS_SMARTMIPS + mflhxu v1 + LONG_S v1, PT_LO(sp) + mflhxu v1 + LONG_S v1, PT_HI(sp) + mflhxu v1 + LONG_S v1, PT_ACX(sp) +#else mfhi v1 + LONG_S v1, PT_HI(sp) + mflo v1 + LONG_S v1, PT_LO(sp) +#endif #ifdef CONFIG_32BIT LONG_S $8, PT_R8(sp) LONG_S $9, PT_R9(sp) #endif - LONG_S v1, PT_HI(sp) - mflo v1 LONG_S $10, PT_R10(sp) LONG_S $11, PT_R11(sp) - LONG_S v1, PT_LO(sp) LONG_S $12, PT_R12(sp) LONG_S $13, PT_R13(sp) LONG_S $14, PT_R14(sp) @@ -182,16 +191,25 @@ .endm .macro RESTORE_TEMP +#ifdef CONFIG_CPU_HAS_SMARTMIPS + LONG_L $24, PT_ACX(sp) + mtlhx $24 + LONG_L $24, PT_HI(sp) + mtlhx $24 LONG_L $24, PT_LO(sp) + mtlhx $24 +#else + LONG_L $24, PT_LO(sp) + mtlo $24 + LONG_L $24, PT_HI(sp) + mthi $24 +#endif #ifdef CONFIG_32BIT LONG_L $8, PT_R8(sp) LONG_L $9, PT_R9(sp) #endif - mtlo $24 - LONG_L $24, PT_HI(sp) LONG_L $10, PT_R10(sp) LONG_L $11, PT_R11(sp) - mthi $24 LONG_L $12, PT_R12(sp) LONG_L $13, PT_R13(sp) LONG_L $14, PT_R14(sp) |