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author | Jaecheol Lee <jc.lee@samsung.com> | 2010-09-15 15:57:37 +0900 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-21 07:52:17 +0900 |
commit | 1d826d14cc2783d0c09750c2e1eeb2bdd358769b (patch) | |
tree | 639f9e039291ac3c152eb2158d8f5678f5e25107 /arch/arm/plat-s5p/include | |
parent | 2a5555822ea83d583b46437cff6829eec0166475 (diff) | |
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ARM: S5PV210: Add DMC map_desc table for supporting DMC access
This patch adds DMC(DRAM Memory Controller) map_desc table.
Because some driver such as CPUFREQ need to access DMC register.
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p/include')
-rw-r--r-- | arch/arm/plat-s5p/include/plat/map-s5p.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h index c4ff88bf647..24728947682 100644 --- a/arch/arm/plat-s5p/include/plat/map-s5p.h +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h @@ -18,6 +18,8 @@ #define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) #define S5P_VA_SROMC S3C_ADDR(0x01100000) #define S5P_VA_SYSRAM S3C_ADDR(0x01180000) +#define S5P_VA_DMC0 S3C_ADDR(0x00A00000) +#define S5P_VA_DMC1 S3C_ADDR(0x00A80000) #define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000) #define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10) |