diff options
author | Alistair Strachan <alistair.strachan@imgtec.com> | 2011-06-10 10:40:06 -0700 |
---|---|---|
committer | Rebecca Schultz Zavin <rebecca@android.com> | 2011-07-11 17:00:30 -0700 |
commit | b44bad7fc139dfb0b57f6493966299600d51da06 (patch) | |
tree | fe0c96d30ec530be8092690f318524958e87eae2 | |
parent | 6fa70b73010a837fc70f34a9fc747a8692f83a1a (diff) | |
download | kernel_samsung_espresso10-b44bad7fc139dfb0b57f6493966299600d51da06.tar.gz kernel_samsung_espresso10-b44bad7fc139dfb0b57f6493966299600d51da06.tar.bz2 kernel_samsung_espresso10-b44bad7fc139dfb0b57f6493966299600d51da06.zip |
gpu: pvr: First attempt to add ProcessFlip2 feature Signed-off-by: Alistair Strachan <alistair.strachan@imgtec.com> Signed-off-by: Alistair Strachan <alistair.strachan@imgtec.com>
-rw-r--r-- | drivers/gpu/pvr/bridged_pvr_bridge.c | 78 | ||||
-rw-r--r-- | drivers/gpu/pvr/deviceclass.c | 124 | ||||
-rw-r--r-- | drivers/gpu/pvr/kerneldisplay.h | 20 | ||||
-rw-r--r-- | drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c | 7 | ||||
-rw-r--r-- | drivers/gpu/pvr/pvr_bridge.h | 25 | ||||
-rw-r--r-- | drivers/gpu/pvr/pvr_bridge_km.h | 10 |
6 files changed, 258 insertions, 6 deletions
diff --git a/drivers/gpu/pvr/bridged_pvr_bridge.c b/drivers/gpu/pvr/bridged_pvr_bridge.c index cbd6055c467..ee0fb12fb2f 100644 --- a/drivers/gpu/pvr/bridged_pvr_bridge.c +++ b/drivers/gpu/pvr/bridged_pvr_bridge.c @@ -2944,6 +2944,83 @@ PVRSRVSwapToDCBufferBW(IMG_UINT32 ui32BridgeID, } static IMG_INT +PVRSRVSwapToDCBuffer2BW(IMG_UINT32 ui32BridgeID, + PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER2 *psSwapDispClassBufferIN, + PVRSRV_BRIDGE_RETURN *psRetOUT, + PVRSRV_PER_PROCESS_DATA *psPerProc) +{ + IMG_VOID *pvDispClassInfo; + IMG_VOID *pvSwapChainBuf; + + IMG_UINT32 i; + + PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER2); + + psRetOUT->eError = + PVRSRVLookupHandle(psPerProc->psHandleBase, + &pvDispClassInfo, + psSwapDispClassBufferIN->hDeviceKM, + PVRSRV_HANDLE_TYPE_DISP_INFO); + if(psRetOUT->eError != PVRSRV_OK) + { + return 0; + } + + psRetOUT->eError = + PVRSRVLookupSubHandle(psPerProc->psHandleBase, + &pvSwapChainBuf, + psSwapDispClassBufferIN->hBuffer, + PVRSRV_HANDLE_TYPE_DISP_BUFFER, + psSwapDispClassBufferIN->hDeviceKM); + if(psRetOUT->eError != PVRSRV_OK) + { + return 0; + } + + for (i = 0; i < psSwapDispClassBufferIN->ui32NumMemInfos; i++) + { + PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo; + PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo; + + psRetOUT->eError = + PVRSRVLookupHandle(psPerProc->psHandleBase, + (IMG_PVOID *)&psKernelMemInfo, + psSwapDispClassBufferIN->psKernelMemInfo[i], + PVRSRV_HANDLE_TYPE_MEM_INFO); + if(psRetOUT->eError != PVRSRV_OK) + { + return 0; + } + + psRetOUT->eError = + PVRSRVLookupHandle(psPerProc->psHandleBase, + (IMG_PVOID *)&psKernelSyncInfo, + psSwapDispClassBufferIN->psKernelSyncInfo[i], + PVRSRV_HANDLE_TYPE_SYNC_INFO); + if(psRetOUT->eError != PVRSRV_OK) + { + return 0; + } + + psSwapDispClassBufferIN->psKernelMemInfo[i] = psKernelMemInfo; + psSwapDispClassBufferIN->psKernelSyncInfo[i] = psKernelSyncInfo; + } + + psRetOUT->eError = + PVRSRVSwapToDCBuffer2KM(pvDispClassInfo, + pvSwapChainBuf, + psSwapDispClassBufferIN->ui32SwapInterval, + psSwapDispClassBufferIN->hPrivateTag, + psSwapDispClassBufferIN->psKernelMemInfo, + psSwapDispClassBufferIN->psKernelSyncInfo, + psSwapDispClassBufferIN->ui32NumMemInfos, + psSwapDispClassBufferIN->acPrivData, + psSwapDispClassBufferIN->ui32PrivDataLength); + + return 0; +} + +static IMG_INT PVRSRVSwapToDCSystemBW(IMG_UINT32 ui32BridgeID, PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM *psSwapDispClassSystemIN, PVRSRV_BRIDGE_RETURN *psRetOUT, @@ -4526,6 +4603,7 @@ CommonBridgeInit(IMG_VOID) SetDispatchTableEntry(PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY, PVRSRVSetDCSrcColourKeyBW); SetDispatchTableEntry(PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS, PVRSRVGetDCBuffersBW); SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER, PVRSRVSwapToDCBufferBW); + SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER2, PVRSRVSwapToDCBuffer2BW); SetDispatchTableEntry(PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM, PVRSRVSwapToDCSystemBW); diff --git a/drivers/gpu/pvr/deviceclass.c b/drivers/gpu/pvr/deviceclass.c index 7b565dd8168..155650ec296 100644 --- a/drivers/gpu/pvr/deviceclass.c +++ b/drivers/gpu/pvr/deviceclass.c @@ -1326,6 +1326,130 @@ PVRSRV_ERROR PVRSRVGetDCBuffersKM(IMG_HANDLE hDeviceKM, IMG_EXPORT +PVRSRV_ERROR PVRSRVSwapToDCBuffer2KM(IMG_HANDLE hDeviceKM, + IMG_HANDLE hBuffer, + IMG_UINT32 ui32SwapInterval, + IMG_HANDLE hPrivateTag, + PVRSRV_KERNEL_MEM_INFO **ppsMemInfos, + PVRSRV_KERNEL_SYNC_INFO **ppsSyncInfos, + IMG_UINT32 ui32NumMemSyncInfos, + IMG_PVOID pvPrivData, + IMG_UINT32 ui32PrivDataLength) +{ + PVRSRV_ERROR eError; + PVRSRV_DISPLAYCLASS_INFO *psDCInfo; + PVRSRV_DC_BUFFER *psBuffer; + PVRSRV_QUEUE_INFO *psQueue; + DISPLAYCLASS_FLIP_COMMAND2 *psFlipCmd; + IMG_BOOL bAddReferenceToLast = IMG_TRUE; + IMG_UINT16 ui16SwapCommandID = DC_FLIP_COMMAND; + IMG_UINT32 ui32NumSrcSyncs = 1; + PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[2]; + PVRSRV_COMMAND *psCommand; + SYS_DATA *psSysData; + IMG_UINT32 i; + + if(!hDeviceKM || !hBuffer) + { + PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Invalid parameters")); + return PVRSRV_ERROR_INVALID_PARAMS; + } + + psBuffer = (PVRSRV_DC_BUFFER*)hBuffer; + psDCInfo = DCDeviceHandleToDCInfo(hDeviceKM); + + if(ui32SwapInterval < psBuffer->psSwapChain->ui32MinSwapInterval || + ui32SwapInterval > psBuffer->psSwapChain->ui32MaxSwapInterval) + { + PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Invalid swap interval. Requested %u, Allowed range %u-%u", + ui32SwapInterval, psBuffer->psSwapChain->ui32MinSwapInterval, psBuffer->psSwapChain->ui32MaxSwapInterval)); + return PVRSRV_ERROR_INVALID_SWAPINTERVAL; + } + +#if defined(SUPPORT_CUSTOM_SWAP_OPERATIONS) + if(psDCInfo->psFuncTable->pfnQuerySwapCommandID != IMG_NULL) + { + psDCInfo->psFuncTable->pfnQuerySwapCommandID(psDCInfo->hExtDevice, + psBuffer->psSwapChain->hExtSwapChain, + psBuffer->sDeviceClassBuffer.hExtBuffer, + hPrivateTag, + &ui16SwapCommandID, + &bAddReferenceToLast); + } +#endif + + psQueue = psBuffer->psSwapChain->psQueue; + + apsSrcSync[0] = psBuffer->sDeviceClassBuffer.psKernelSyncInfo; + + if(bAddReferenceToLast && psBuffer->psSwapChain->psLastFlipBuffer && + psBuffer != psBuffer->psSwapChain->psLastFlipBuffer) + { + apsSrcSync[1] = psBuffer->psSwapChain->psLastFlipBuffer->sDeviceClassBuffer.psKernelSyncInfo; + ui32NumSrcSyncs++; + } + + eError = PVRSRVInsertCommandKM (psQueue, + &psCommand, + psDCInfo->ui32DeviceID, + ui16SwapCommandID, + 0, + IMG_NULL, + ui32NumSrcSyncs, + apsSrcSync, + sizeof(DISPLAYCLASS_FLIP_COMMAND2)); + if(eError != PVRSRV_OK) + { + PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to get space in queue")); + goto Exit; + } + + psFlipCmd = (DISPLAYCLASS_FLIP_COMMAND2*)psCommand->pvData; + psFlipCmd->hExtDevice = psDCInfo->hExtDevice; + psFlipCmd->hExtSwapChain = psBuffer->psSwapChain->hExtSwapChain; + psFlipCmd->hExtBuffer = psBuffer->sDeviceClassBuffer.hExtBuffer; + psFlipCmd->hPrivateTag = hPrivateTag; + psFlipCmd->ui32SwapInterval = ui32SwapInterval; + + psFlipCmd->ui32NumMemInfos = ui32NumMemSyncInfos; + for(i = 0; i < ui32NumMemSyncInfos; i++) + { + psFlipCmd->ppsKernelMemInfos[i] = ppsMemInfos[i]; + psFlipCmd->ppsKernelSyncInfos[i] = ppsSyncInfos[i]; + } + + psFlipCmd->ui32PrivDataLength = ui32PrivDataLength; + memcpy(psFlipCmd->acPrivData, pvPrivData, ui32PrivDataLength); + + eError = PVRSRVSubmitCommandKM (psQueue, psCommand); + if (eError != PVRSRV_OK) + { + PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to submit command")); + goto Exit; + } + + SysAcquireData(&psSysData); + eError = OSScheduleMISR(psSysData); + + if (eError != PVRSRV_OK) + { + PVR_DPF((PVR_DBG_ERROR,"PVRSRVSwapToDCBuffer2KM: Failed to schedule MISR")); + goto Exit; + } + + psBuffer->psSwapChain->psLastFlipBuffer = psBuffer; + +Exit: + if(eError == PVRSRV_ERROR_CANNOT_GET_QUEUE_SPACE) + { + eError = PVRSRV_ERROR_RETRY; + } + + return eError; +} + + +IMG_EXPORT PVRSRV_ERROR PVRSRVSwapToDCBufferKM(IMG_HANDLE hDeviceKM, IMG_HANDLE hBuffer, IMG_UINT32 ui32SwapInterval, diff --git a/drivers/gpu/pvr/kerneldisplay.h b/drivers/gpu/pvr/kerneldisplay.h index cdbef00bf25..8db5e604f28 100644 --- a/drivers/gpu/pvr/kerneldisplay.h +++ b/drivers/gpu/pvr/kerneldisplay.h @@ -31,6 +31,8 @@ extern "C" { #endif +#include "servicesint.h" + typedef PVRSRV_ERROR (*PFN_OPEN_DC_DEVICE)(IMG_UINT32, IMG_HANDLE*, PVRSRV_SYNC_DATA*); typedef PVRSRV_ERROR (*PFN_CLOSE_DC_DEVICE)(IMG_HANDLE); typedef PVRSRV_ERROR (*PFN_ENUM_DC_FORMATS)(IMG_HANDLE, IMG_UINT32*, DISPLAY_FORMAT*); @@ -146,6 +148,24 @@ typedef struct DISPLAYCLASS_FLIP_COMMAND_TAG } DISPLAYCLASS_FLIP_COMMAND; +typedef struct DISPLAYCLASS_FLIP_COMMAND2_TAG +{ + IMG_HANDLE hExtDevice; + IMG_HANDLE hExtSwapChain; + IMG_HANDLE hExtBuffer; + IMG_HANDLE hPrivateTag; + IMG_UINT32 ui32SwapInterval; + + PVRSRV_KERNEL_MEM_INFO *ppsKernelMemInfos[10]; + PVRSRV_KERNEL_SYNC_INFO *ppsKernelSyncInfos[10]; + IMG_UINT32 ui32NumMemInfos; + + IMG_CHAR acPrivData[508]; + IMG_UINT32 ui32PrivDataLength; + +} DISPLAYCLASS_FLIP_COMMAND2; + +#define DC_FLIP_COMMAND 0 #define DC_FLIP_COMMAND 0 #define DC_STATE_NO_FLUSH_COMMANDS 0 diff --git a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c index 4483e51de10..c21e2f6e863 100644 --- a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c +++ b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c @@ -771,21 +771,20 @@ static IMG_BOOL ProcessFlip(IMG_HANDLE hCmdCookie, IMG_UINT32 ui32DataSize, IMG_VOID *pvData) { - DISPLAYCLASS_FLIP_COMMAND *psFlipCmd; + DISPLAYCLASS_FLIP_COMMAND2 *psFlipCmd; OMAPLFB_DEVINFO *psDevInfo; OMAPLFB_BUFFER *psBuffer; OMAPLFB_SWAPCHAIN *psSwapChain; - if(!hCmdCookie || !pvData) { return IMG_FALSE; } - psFlipCmd = (DISPLAYCLASS_FLIP_COMMAND*)pvData; + psFlipCmd = (DISPLAYCLASS_FLIP_COMMAND2*)pvData; - if (psFlipCmd == IMG_NULL || sizeof(DISPLAYCLASS_FLIP_COMMAND) != ui32DataSize) + if (psFlipCmd == IMG_NULL || sizeof(DISPLAYCLASS_FLIP_COMMAND2) != ui32DataSize) { return IMG_FALSE; } diff --git a/drivers/gpu/pvr/pvr_bridge.h b/drivers/gpu/pvr/pvr_bridge.h index ab05641a3c9..3405c0c4319 100644 --- a/drivers/gpu/pvr/pvr_bridge.h +++ b/drivers/gpu/pvr/pvr_bridge.h @@ -168,8 +168,9 @@ extern "C" { #define PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+11) #define PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+12) #define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+13) -#define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14) -#define PVRSRV_BRIDGE_DISPCLASS_CMD_LAST (PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14) +#define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER2 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14) +#define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+15) +#define PVRSRV_BRIDGE_DISPCLASS_CMD_LAST (PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+15) #define PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST (PVRSRV_BRIDGE_DISPCLASS_CMD_LAST+1) #define PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+0) @@ -1174,6 +1175,26 @@ typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER_TAG } PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER; +typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER2_TAG +{ + IMG_UINT32 ui32BridgeFlags; /* Must be first member of structure */ + IMG_HANDLE hDeviceKM; + IMG_HANDLE hBuffer; + IMG_UINT32 ui32SwapInterval; + IMG_HANDLE hPrivateTag; + + /* FIXME: Don't limit this to 10 slots */ + PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo[10]; + PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo[10]; + IMG_UINT32 ui32NumMemInfos; + + /* FIXME: Don't fix this to 508 bytes! */ + IMG_CHAR acPrivData[508]; + IMG_UINT32 ui32PrivDataLength; + +} PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER2; + + typedef struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM_TAG { IMG_UINT32 ui32BridgeFlags; diff --git a/drivers/gpu/pvr/pvr_bridge_km.h b/drivers/gpu/pvr/pvr_bridge_km.h index 1175b76c194..4c5753b9376 100644 --- a/drivers/gpu/pvr/pvr_bridge_km.h +++ b/drivers/gpu/pvr/pvr_bridge_km.h @@ -232,6 +232,16 @@ PVRSRV_ERROR PVRSRVSwapToDCBufferKM(IMG_HANDLE hDeviceKM, IMG_UINT32 ui32ClipRectCount, IMG_RECT *psClipRect); IMG_IMPORT +PVRSRV_ERROR PVRSRVSwapToDCBuffer2KM(IMG_HANDLE hDeviceKM, + IMG_HANDLE hBuffer, + IMG_UINT32 ui32SwapInterval, + IMG_HANDLE hPrivateTag, + PVRSRV_KERNEL_MEM_INFO **ppsMemInfos, + PVRSRV_KERNEL_SYNC_INFO **ppsSyncInfos, + IMG_UINT32 ui32NumMemSyncInfos, + IMG_PVOID pvPrivData, + IMG_UINT32 ui32PrivDataLength); +IMG_IMPORT PVRSRV_ERROR PVRSRVSwapToDCSystemKM(IMG_HANDLE hDeviceKM, IMG_HANDLE hSwapChain); |