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| author | Sekhar Nori <nsekhar@ti.com> | 2010-12-20 21:31:33 +0530 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-12-22 11:45:29 -0800 |
| commit | 39e145500458bd68d1d33adfa256886900b1597b (patch) | |
| tree | 007b79cdc3fa8935ac8b13c84c68f89e479fe2a5 /arch/arm/mach-davinci/include | |
| parent | 9cc3049911d0166d54247cf2471802eb5293c66c (diff) | |
| download | kernel_samsung_crespo-39e145500458bd68d1d33adfa256886900b1597b.tar.gz kernel_samsung_crespo-39e145500458bd68d1d33adfa256886900b1597b.tar.bz2 kernel_samsung_crespo-39e145500458bd68d1d33adfa256886900b1597b.zip | |
davinci: am18x/da850/omap-l138: add support for higher speed grades
AM18x/DA850/OMAP-L138 SoCs have variants that can operate
at a maximum of 456 MHz at 1.3V operating point. Also the
1.2V operating point has a variant that can support a maximum
of 375 MHz.
This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz)
to the list of DA850 OPPs.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
Because of this, we depend on the maximum speed grade information
to be provided to us in some board specific way. The board informs
the maximum speed grade information by setting the da850_max_speed
variable.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/include')
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 4247b3f53b3..e7f95206652 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -28,6 +28,13 @@ extern void __iomem *da8xx_syscfg0_base; extern void __iomem *da8xx_syscfg1_base; /* + * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade + * (than the regular 300Mhz variant), the board code should set this up + * with the supported speed before calling da850_register_cpufreq(). + */ +extern unsigned int da850_max_speed; + +/* * The cp_intc interrupt controller for the da8xx isn't in the same * chunk of physical memory space as the other registers (like it is * on the davincis) so it needs to be mapped separately. It will be |