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| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-04-07 13:09:52 +0300 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-04-21 08:42:10 +0300 |
| commit | 8b2332e3d11dc047e11bc84a4f8da45ccfb6013b (patch) | |
| tree | 0fea1c2a6b56e8180459b4b94caec94c1d1d2004 /src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | |
| parent | 0ad83d222b0a4c3be676ca8708a4a565888b34fd (diff) | |
| download | external_mesa3d-8b2332e3d11dc047e11bc84a4f8da45ccfb6013b.tar.gz external_mesa3d-8b2332e3d11dc047e11bc84a4f8da45ccfb6013b.tar.bz2 external_mesa3d-8b2332e3d11dc047e11bc84a4f8da45ccfb6013b.zip | |
i965: Allow texture surface state setup to be used by blorp
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_wm_surface_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 79182560a3..74389525a1 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -273,6 +273,7 @@ gen7_emit_texture_surface_state(struct brw_context *brw, unsigned format, unsigned swizzle, uint32_t *surf_offset, + int surf_index /* unused */, bool rw, bool for_gather) { const unsigned depth = max_layer - min_layer; @@ -387,12 +388,14 @@ gen7_update_texture_surface(struct gl_context *ctx, if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT) format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD; + const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; + gen7_emit_texture_surface_state(brw, mt, obj->Target, obj->MinLayer, obj->MinLayer + depth, obj->MinLevel + obj->BaseLevel, obj->MinLevel + intel_obj->_MaxLevel + 1, - format, swizzle, - surf_offset, false, for_gather); + format, swizzle, surf_offset, + surf_index, false, for_gather); } } |