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| author | Chad Versace <chad.versace@intel.com> | 2016-10-06 15:21:49 -0700 |
|---|---|---|
| committer | Nanley Chery <nanley.g.chery@intel.com> | 2016-10-07 12:54:18 -0700 |
| commit | 917814dccd4354db09a1b7bf977ef2352b74c917 (patch) | |
| tree | fcc5628593a7ed85de5d52e5ecabe460616b6c5f /bin | |
| parent | 3aec432ed3306ffb62e2a703f5b419d5ae012afa (diff) | |
| download | external_mesa3d-917814dccd4354db09a1b7bf977ef2352b74c917.tar.gz external_mesa3d-917814dccd4354db09a1b7bf977ef2352b74c917.tar.bz2 external_mesa3d-917814dccd4354db09a1b7bf977ef2352b74c917.zip | |
anv: Allocate hiz surface
Nanley Chery:
(rebase)
- Use isl_surf_get_hiz_surf()
(amend)
- Only add a HiZ surface onto a depth/stencil attachment
- Add comment above HiZ surface addition
- Hide HiZ behind INTEL_VK_HIZ prior to BDW
- Disable HiZ for untested cases
- Remove DISABLE_AUX_BIT instead of preventing it from being added
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Diffstat (limited to 'bin')
0 files changed, 0 insertions, 0 deletions