4 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 06bf010ba0..bd66159e15 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -155,7 +155,7 @@ void ScheduleDAG::BuildSchedUnits() {
           break;
         }
       }
-      if (TID.Flags & M_COMMUTABLE)
+      if (TID.isCommutable())
         SU->isCommutable = true;
     }
     
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 846004e213..ca06cbb37b 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -437,7 +437,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
         break;
       }
     }
-    if (TID->Flags & M_COMMUTABLE)
+    if (TID->isCommutable())
       NewSU->isCommutable = true;
     // FIXME: Calculate height / depth and propagate the changes?
     NewSU->Depth = SU->Depth;
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index e77b95eeb9..3167fccf40 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -144,7 +144,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
             // so, swap the B and C operands.  This makes the live ranges of A
             // and C joinable.
             // FIXME: This code also works for A := B op C instructions.
-            if ((TID->Flags & M_COMMUTABLE) && mi->getNumOperands() >= 3) {
+            if (TID->isCommutable() && mi->getNumOperands() >= 3) {
               assert(mi->getOperand(3-si).isRegister() &&
                      "Not a proper commutative instruction!");
               unsigned regC = mi->getOperand(3-si).getReg();
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index fa52be8382..2e9d802d70 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -838,7 +838,7 @@ ARMInstrInfo::SubsumesPredicate(const std::vector<MachineOperand> &Pred1,
 bool ARMInstrInfo::DefinesPredicate(MachineInstr *MI,
                                     std::vector<MachineOperand> &Pred) const {
   const TargetInstrDescriptor *TID = MI->getDesc();
-  if (!TID->ImplicitDefs && (TID->Flags & M_HAS_OPTIONAL_DEF) == 0)
+  if (!TID->getImplicitDefs() && !TID->hasOptionalDef())
     return false;
 
   bool Found = false;