diff options
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 | ||||
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 4 | ||||
-rw-r--r-- | lib/Target/PIC16/PIC16ISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 6 |
8 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index d26a5fbd34..498729f985 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -733,7 +733,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) { InFlag = SDValue(ResNode, 1); ReplaceUses(SDValue(Op.Val, 1), InFlag); } - ReplaceUses(SDValue(Op.Val, 0), SDValue(Chain.Val, Chain.ResNo)); + ReplaceUses(SDValue(Op.Val, 0), SDValue(Chain.Val, Chain.getResNo())); return NULL; } case ARMISD::CMOV: { diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index c696832fda..c853a32125 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -646,7 +646,7 @@ SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { ResultVals.push_back(Chain); SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size()); - return Res.getValue(Op.ResNo); + return Res.getValue(Op.getResNo()); } static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) { diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index 5f621ed8ec..4baadedd0f 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -1292,7 +1292,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { // Otherwise, merge everything together with a MERGE_VALUES node. ResultVals[NumResults++] = Chain; SDValue Res = DAG.getMergeValues(ResultVals, NumResults); - return Res.getValue(Op.ResNo); + return Res.getValue(Op.getResNo()); } static SDValue diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index a364f7c6f2..d74ec0dc60 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -750,7 +750,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG) // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo); + return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.getResNo()); } /// LowerCallResult - Lower the result values of an ISD::CALL into the @@ -926,7 +926,7 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) // Return the new list of results. return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0], - ArgValues.size()).getValue(Op.ResNo); + ArgValues.size()).getValue(Op.getResNo()); } //===----------------------------------------------------------------------===// diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp index fe22f2ef8a..f067747b1c 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.cpp +++ b/lib/Target/PIC16/PIC16ISelLowering.cpp @@ -544,7 +544,7 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) ArgValues.push_back(Root); return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0], - ArgValues.size()).getValue(Op.ResNo); + ArgValues.size()).getValue(Op.getResNo()); } diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 1908a057fa..fc8399892f 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2511,7 +2511,7 @@ SDValue PPCTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG, "Flag must be set. Depend on flag being set in LowerRET"); Chain = DAG.getNode(PPCISD::TAILCALL, Op.Val->getVTList(), &Ops[0], Ops.size()); - return SDValue(Chain.Val, Op.ResNo); + return SDValue(Chain.Val, Op.getResNo()); } Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size()); @@ -2548,7 +2548,7 @@ SDValue PPCTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG, ResultVals.push_back(Chain); SDValue Res = DAG.getMergeValues(Op.Val->getVTList(), &ResultVals[0], ResultVals.size()); - return Res.getValue(Op.ResNo); + return Res.getValue(Op.getResNo()); } SDValue PPCTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG, diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 3f9b1c20d7..7718ea9fa5 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -253,7 +253,7 @@ static SDNode *findFlagUse(SDNode *N) { SDNode *User = *I; for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) { SDValue Op = User->getOperand(i); - if (Op.Val == N && Op.ResNo == FlagResNo) + if (Op.Val == N && Op.getResNo() == FlagResNo) return User; } } @@ -888,7 +888,7 @@ DOUT << "AlreadySelected " << AlreadySelected << "\n"; case ISD::SMUL_LOHI: case ISD::UMUL_LOHI: // A mul_lohi where we need the low part can be folded as a plain multiply. - if (N.ResNo != 0) break; + if (N.getResNo() != 0) break; // FALL THROUGH case ISD::MUL: // X*[3,5,9] -> X+X*[2,4,8] diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0477c279ee..9cc1beddb4 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1396,7 +1396,7 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { // Return the new list of results. return DAG.getMergeValues(Op.Val->getVTList(), &ArgValues[0], - ArgValues.size()).getValue(Op.ResNo); + ArgValues.size()).getValue(Op.getResNo()); } SDValue @@ -1760,7 +1760,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { Chain = DAG.getNode(X86ISD::TAILCALL, Op.Val->getVTList(), &Ops[0], Ops.size()); - return SDValue(Chain.Val, Op.ResNo); + return SDValue(Chain.Val, Op.getResNo()); } Chain = DAG.getNode(X86ISD::CALL, NodeTys, &Ops[0], Ops.size()); @@ -1787,7 +1787,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo); + return SDValue(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.getResNo()); } |