diff options
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/CBackend/CTargetMachine.h | 1 | ||||
-rw-r--r-- | lib/Target/Sparc/SparcTargetMachine.h | 1 | ||||
-rw-r--r-- | lib/Target/SparcV8/SparcV8TargetMachine.h | 1 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9AsmPrinter.cpp | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9Internals.h | 14 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9TargetMachine.cpp | 1 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9TargetMachine.h | 2 | ||||
-rw-r--r-- | lib/Target/TargetMachine.cpp | 19 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.h | 14 |
9 files changed, 6 insertions, 49 deletions
diff --git a/lib/Target/CBackend/CTargetMachine.h b/lib/Target/CBackend/CTargetMachine.h index 53e01471ea..dba714d2ff 100644 --- a/lib/Target/CBackend/CTargetMachine.h +++ b/lib/Target/CBackend/CTargetMachine.h @@ -27,7 +27,6 @@ struct CTargetMachine : public TargetMachine { virtual const TargetFrameInfo &getFrameInfo() const { abort(); } virtual const TargetSchedInfo &getSchedInfo() const { abort(); } virtual const TargetRegInfo &getRegInfo() const { abort(); } - virtual const TargetCacheInfo &getCacheInfo() const { abort(); } // This is the only thing that actually does anything here. virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); diff --git a/lib/Target/Sparc/SparcTargetMachine.h b/lib/Target/Sparc/SparcTargetMachine.h index ae77fb2935..13f655ab1f 100644 --- a/lib/Target/Sparc/SparcTargetMachine.h +++ b/lib/Target/Sparc/SparcTargetMachine.h @@ -42,7 +42,6 @@ public: virtual const TargetSchedInfo &getSchedInfo() const { abort(); } virtual const TargetRegInfo &getRegInfo() const { abort(); } - virtual const TargetCacheInfo &getCacheInfo() const { abort(); } /// addPassesToEmitMachineCode - Add passes to the specified pass manager to /// get machine code emitted. This uses a MachineCodeEmitter object to handle diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.h b/lib/Target/SparcV8/SparcV8TargetMachine.h index ae77fb2935..13f655ab1f 100644 --- a/lib/Target/SparcV8/SparcV8TargetMachine.h +++ b/lib/Target/SparcV8/SparcV8TargetMachine.h @@ -42,7 +42,6 @@ public: virtual const TargetSchedInfo &getSchedInfo() const { abort(); } virtual const TargetRegInfo &getRegInfo() const { abort(); } - virtual const TargetCacheInfo &getCacheInfo() const { abort(); } /// addPassesToEmitMachineCode - Add passes to the specified pass manager to /// get machine code emitted. This uses a MachineCodeEmitter object to handle diff --git a/lib/Target/SparcV9/SparcV9AsmPrinter.cpp b/lib/Target/SparcV9/SparcV9AsmPrinter.cpp index 146f11c899..0fa4c49ceb 100644 --- a/lib/Target/SparcV9/SparcV9AsmPrinter.cpp +++ b/lib/Target/SparcV9/SparcV9AsmPrinter.cpp @@ -119,7 +119,7 @@ namespace { /// inline unsigned int SizeToAlignment(unsigned int size, const TargetMachine& target) { - unsigned short cacheLineSize = target.getCacheInfo().getCacheLineSize(1); + const unsigned short cacheLineSize = 16; if (size > (unsigned) cacheLineSize / 2) return cacheLineSize; else diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h index d0e03ed52c..20ebc424ee 100644 --- a/lib/Target/SparcV9/SparcV9Internals.h +++ b/lib/Target/SparcV9/SparcV9Internals.h @@ -19,7 +19,6 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetSchedInfo.h" #include "llvm/Target/TargetFrameInfo.h" -#include "llvm/Target/TargetCacheInfo.h" #include "llvm/Target/TargetRegInfo.h" #include "llvm/Type.h" #include "SparcV9RegClassInfo.h" @@ -89,19 +88,6 @@ protected: virtual void initializeResources(); }; -//--------------------------------------------------------------------------- -// class SparcV9CacheInfo -// -// Purpose: -// Interface to cache parameters for the UltraSPARC. -// Just use defaults for now. -//--------------------------------------------------------------------------- - -struct SparcV9CacheInfo: public TargetCacheInfo { - SparcV9CacheInfo(const TargetMachine &T) : TargetCacheInfo(T) {} -}; - - /// createStackSlotsPass - External interface to stack-slots pass that enters 2 /// empty slots at the top of each function stack /// diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp index 9611c1041e..92c670c834 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp +++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp @@ -116,7 +116,6 @@ SparcV9TargetMachine::SparcV9TargetMachine(IntrinsicLowering *il) schedInfo(*this), regInfo(*this), frameInfo(*this), - cacheInfo(*this), jitInfo(*this) { } diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.h b/lib/Target/SparcV9/SparcV9TargetMachine.h index 75a780c22f..424dcd11e4 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.h +++ b/lib/Target/SparcV9/SparcV9TargetMachine.h @@ -30,7 +30,6 @@ class SparcV9TargetMachine : public TargetMachine { SparcV9SchedInfo schedInfo; SparcV9RegInfo regInfo; SparcV9FrameInfo frameInfo; - SparcV9CacheInfo cacheInfo; SparcV9JITInfo jitInfo; public: SparcV9TargetMachine(IntrinsicLowering *IL); @@ -39,7 +38,6 @@ public: virtual const TargetSchedInfo &getSchedInfo() const { return schedInfo; } virtual const TargetRegInfo &getRegInfo() const { return regInfo; } virtual const TargetFrameInfo &getFrameInfo() const { return frameInfo; } - virtual const TargetCacheInfo &getCacheInfo() const { return cacheInfo; } virtual TargetJITInfo *getJITInfo() { return &jitInfo; } virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 51c1222ab6..30199be06a 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -8,12 +8,10 @@ //===----------------------------------------------------------------------===// // // This file describes the general parts of a Target machine. -// This file also implements TargetCacheInfo. // //===----------------------------------------------------------------------===// #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetCacheInfo.h" #include "llvm/Type.h" #include "llvm/IntrinsicLowering.h" using namespace llvm; @@ -33,15 +31,10 @@ TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il, IL = il ? il : new DefaultIntrinsicLowering(); } - - TargetMachine::~TargetMachine() { delete IL; } - - - unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const { // All integer types smaller than ints promote to 4 byte integers. if (Ty->isIntegral() && Ty->getPrimitiveSize() < 4) @@ -49,15 +42,3 @@ unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const { return DataLayout.getTypeSize(Ty); } - - -//--------------------------------------------------------------------------- -// TargetCacheInfo Class -// - -void TargetCacheInfo::Initialize() { - numLevels = 2; - cacheLineSizes.push_back(16); cacheLineSizes.push_back(32); - cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20); - cacheAssoc.push_back(1); cacheAssoc.push_back(4); -} diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index be8d8879a1..de85f95f73 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -32,18 +32,14 @@ public: virtual const X86InstrInfo &getInstrInfo() const { return InstrInfo; } virtual const TargetFrameInfo &getFrameInfo() const { return FrameInfo; } - virtual const MRegisterInfo *getRegisterInfo() const { + virtual TargetJITInfo *getJITInfo() { return &JITInfo; } + virtual const MRegisterInfo *getRegisterInfo() const { return &InstrInfo.getRegisterInfo(); } - virtual TargetJITInfo *getJITInfo() { - return &JITInfo; - } - - - virtual const TargetSchedInfo &getSchedInfo() const { abort(); } - virtual const TargetRegInfo &getRegInfo() const { abort(); } - virtual const TargetCacheInfo &getCacheInfo() const { abort(); } + // deprecated interfaces + virtual const TargetSchedInfo &getSchedInfo() const { abort(); } + virtual const TargetRegInfo &getRegInfo() const { abort(); } /// addPassesToEmitMachineCode - Add passes to the specified pass manager to /// get machine code emitted. This uses a MachineCodeEmitter object to handle |