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Diffstat (limited to 'lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp')
-rw-r--r--lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index d8e6fb469e..6485ad2a2f 100644
--- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -795,7 +795,7 @@ SparcV8TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
//===----------------------------------------------------------------------===//
//===--------------------------------------------------------------------===//
-/// SparcV8DAGToDAGISel - PPC specific code to select Sparc V8 machine
+/// SparcV8DAGToDAGISel - SPARC specific code to select Sparc V8 machine
/// instructions for SelectionDAG operations.
///
namespace {
@@ -816,7 +816,7 @@ public:
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
virtual const char *getPassName() const {
- return "PowerPC DAG->DAG Pattern Instruction Selection";
+ return "SparcV8 DAG->DAG Pattern Instruction Selection";
}
// Include the pieces autogenerated from the target description.
@@ -1011,8 +1011,8 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
}
-/// createPPCISelDag - This pass converts a legalized DAG into a
-/// PowerPC-specific DAG, ready for instruction scheduling.
+/// createSparcV8ISelDag - This pass converts a legalized DAG into a
+/// SPARC-specific DAG, ready for instruction scheduling.
///
FunctionPass *llvm::createSparcV8ISelDag(TargetMachine &TM) {
return new SparcV8DAGToDAGISel(TM);