diff options
Diffstat (limited to 'lib/Target/PowerPC')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index 2ec6dcb7d8..27899a7d34 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -106,8 +106,8 @@ unsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI, case PPC::LWZ: case PPC::LFS: case PPC::LFD: - if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && - MI->getOperand(2).isFI()) { + if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() && + MI->getOperand(2).isFrameIndex()) { FrameIndex = MI->getOperand(2).getIndex(); return MI->getOperand(0).getReg(); } @@ -124,8 +124,8 @@ unsigned PPCInstrInfo::isStoreToStackSlot(MachineInstr *MI, case PPC::STW: case PPC::STFS: case PPC::STFD: - if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && - MI->getOperand(2).isFI()) { + if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImm() && + MI->getOperand(2).isFrameIndex()) { FrameIndex = MI->getOperand(2).getIndex(); return MI->getOperand(0).getReg(); } diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 5f0732bc6e..014925e1a6 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -1368,7 +1368,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF, } else if (RetOpcode == PPC::TCRETURNri) { MBBI = prior(MBB.end()); MachineOperand &JumpTarget = MBBI->getOperand(0); - assert(JumpTarget.isReg() && "Expecting register operand."); + assert(JumpTarget.isRegister() && "Expecting register operand."); BuildMI(MBB, MBBI, TII.get(PPC::TAILBCTR)); } else if (RetOpcode == PPC::TCRETURNai) { MBBI = prior(MBB.end()); @@ -1382,7 +1382,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF, } else if (RetOpcode == PPC::TCRETURNri8) { MBBI = prior(MBB.end()); MachineOperand &JumpTarget = MBBI->getOperand(0); - assert(JumpTarget.isReg() && "Expecting register operand."); + assert(JumpTarget.isRegister() && "Expecting register operand."); BuildMI(MBB, MBBI, TII.get(PPC::TAILBCTR8)); } else if (RetOpcode == PPC::TCRETURNai8) { MBBI = prior(MBB.end()); |