diff options
Diffstat (limited to 'lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 48 |
1 files changed, 27 insertions, 21 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index e17f82d6aa..28aa35c737 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -24,6 +24,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/PseudoSourceValue.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Constants.h" #include "llvm/Function.h" @@ -1175,9 +1176,8 @@ static SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG, // memory location argument. MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); - SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2)); - return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(), - SV->getOffset()); + const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); + return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0); } // For ELF 32 ABI we follow the layout of the va_list struct. @@ -1211,37 +1211,41 @@ static SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG, MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); - SDOperand StackOffset = DAG.getFrameIndex(VarArgsStackOffset, PtrVT); + SDOperand StackOffsetFI = DAG.getFrameIndex(VarArgsStackOffset, PtrVT); SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); - SDOperand ConstFrameOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8, - PtrVT); - SDOperand ConstStackOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8 - 1, - PtrVT); - SDOperand ConstFPROffset = DAG.getConstant(1, PtrVT); + uint64_t FrameOffset = MVT::getSizeInBits(PtrVT)/8; + SDOperand ConstFrameOffset = DAG.getConstant(FrameOffset, PtrVT); + + uint64_t StackOffset = MVT::getSizeInBits(PtrVT)/8 - 1; + SDOperand ConstStackOffset = DAG.getConstant(StackOffset, PtrVT); + + uint64_t FPROffset = 1; + SDOperand ConstFPROffset = DAG.getConstant(FPROffset, PtrVT); - SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2)); + const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); // Store first byte : number of int regs SDOperand firstStore = DAG.getStore(Op.getOperand(0), ArgGPR, - Op.getOperand(1), SV->getValue(), - SV->getOffset()); + Op.getOperand(1), SV, 0); + uint64_t nextOffset = FPROffset; SDOperand nextPtr = DAG.getNode(ISD::ADD, PtrVT, Op.getOperand(1), ConstFPROffset); // Store second byte : number of float regs - SDOperand secondStore = DAG.getStore(firstStore, ArgFPR, nextPtr, - SV->getValue(), SV->getOffset()); + SDOperand secondStore = + DAG.getStore(firstStore, ArgFPR, nextPtr, SV, nextOffset); + nextOffset += StackOffset; nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstStackOffset); // Store second word : arguments given on stack - SDOperand thirdStore = DAG.getStore(secondStore, StackOffset, nextPtr, - SV->getValue(), SV->getOffset()); + SDOperand thirdStore = + DAG.getStore(secondStore, StackOffsetFI, nextPtr, SV, nextOffset); + nextOffset += FrameOffset; nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstFrameOffset); // Store third word : arguments given in registers - return DAG.getStore(thirdStore, FR, nextPtr, SV->getValue(), - SV->getOffset()); + return DAG.getStore(thirdStore, FR, nextPtr, SV, nextOffset); } @@ -2199,9 +2203,11 @@ static SDOperand LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { Op.getOperand(0)); // STD the extended value into the stack slot. + MemOperand MO(&PseudoSourceValue::getFixedStack(), + MemOperand::MOStore, FrameIdx, 8, 8); SDOperand Store = DAG.getNode(PPCISD::STD_32, MVT::Other, DAG.getEntryNode(), Ext64, FIdx, - DAG.getSrcValue(NULL)); + DAG.getMemOperand(MO)); // Load the value as a double. SDOperand Ld = DAG.getLoad(MVT::f64, Store, FIdx, NULL, 0); @@ -3300,11 +3306,11 @@ SDOperand PPCTargetLowering::PerformDAGCombine(SDNode *N, std::vector<MVT::ValueType> VTs; VTs.push_back(MVT::i32); VTs.push_back(MVT::Other); - SDOperand SV = DAG.getSrcValue(LD->getSrcValue(), LD->getSrcValueOffset()); + SDOperand MO = DAG.getMemOperand(LD->getMemOperand()); SDOperand Ops[] = { LD->getChain(), // Chain LD->getBasePtr(), // Ptr - SV, // SrcValue + MO, // MemOperand DAG.getValueType(N->getValueType(0)) // VT }; SDOperand BSLoad = DAG.getNode(PPCISD::LBRX, VTs, Ops, 4); |