diff options
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 12 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.h | 13 |
2 files changed, 13 insertions, 12 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index 9a8d7da611..7fe3b471f2 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -333,7 +333,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, // Branch analysis. bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - std::vector<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -432,7 +432,7 @@ unsigned ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { unsigned ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, - const std::vector<MachineOperand> &Cond) const { + const SmallVectorImpl<MachineOperand> &Cond) const { MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); int BOpc = AFI->isThumbFunction() ? ARM::tB : ARM::B; @@ -799,7 +799,7 @@ bool ARMInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { } bool ARMInstrInfo:: -ReverseBranchCondition(std::vector<MachineOperand> &Cond) const { +ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { ARMCC::CondCodes CC = (ARMCC::CondCodes)(int)Cond[0].getImm(); Cond[0].setImm(ARMCC::getOppositeCondition(CC)); return false; @@ -811,7 +811,7 @@ bool ARMInstrInfo::isPredicated(const MachineInstr *MI) const { } bool ARMInstrInfo::PredicateInstruction(MachineInstr *MI, - const std::vector<MachineOperand> &Pred) const { + const SmallVectorImpl<MachineOperand> &Pred) const { unsigned Opc = MI->getOpcode(); if (Opc == ARM::B || Opc == ARM::tB) { MI->setDesc(get(Opc == ARM::B ? ARM::Bcc : ARM::tBcc)); @@ -831,8 +831,8 @@ bool ARMInstrInfo::PredicateInstruction(MachineInstr *MI, } bool -ARMInstrInfo::SubsumesPredicate(const std::vector<MachineOperand> &Pred1, - const std::vector<MachineOperand> &Pred2) const{ +ARMInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, + const SmallVectorImpl<MachineOperand> &Pred2) const{ if (Pred1.size() > 2 || Pred2.size() > 2) return false; diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index 34c547028a..9fb74c15f3 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -158,11 +158,11 @@ public: // Branch analysis. virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - std::vector<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, - const std::vector<MachineOperand> &Cond) const; + const SmallVectorImpl<MachineOperand> &Cond) const; virtual void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SrcReg, @@ -210,18 +210,19 @@ public: SmallVectorImpl<unsigned> &Ops) const; virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const; - virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; + virtual + bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; // Predication support. virtual bool isPredicated(const MachineInstr *MI) const; virtual bool PredicateInstruction(MachineInstr *MI, - const std::vector<MachineOperand> &Pred) const; + const SmallVectorImpl<MachineOperand> &Pred) const; virtual - bool SubsumesPredicate(const std::vector<MachineOperand> &Pred1, - const std::vector<MachineOperand> &Pred2) const; + bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, + const SmallVectorImpl<MachineOperand> &Pred2) const; virtual bool DefinesPredicate(MachineInstr *MI, std::vector<MachineOperand> &Pred) const; |