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-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp12
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 8302d77f1b..7abb7d2418 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -343,7 +343,8 @@ unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI,
unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
const TargetInstrDesc &TID,
unsigned Binary) {
- if ((TID.TSFlags & ARMII::FormMask) == ARMII::Pseudo)
+ unsigned Format = TID.TSFlags & ARMII::FormMask;
+ if (Format == ARMII::Pseudo)
abort(); // FIXME
// Encode S bit if MI modifies CPSR.
@@ -358,7 +359,14 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
}
// Encode first non-shifter register operand if ther is one.
- if ((TID.TSFlags & ARMII::FormMask) != ARMII::UnaryFrm) {
+ bool isUnary = (Format == ARMII::DPRdMisc ||
+ Format == ARMII::DPRdIm ||
+ Format == ARMII::DPRdReg ||
+ Format == ARMII::DPRdSoReg ||
+ Format == ARMII::DPRnIm ||
+ Format == ARMII::DPRnReg ||
+ Format == ARMII::DPRnSoReg);
+ if (!isUnary) {
Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
++OpIdx;
}