diff options
Diffstat (limited to 'include/llvm/CodeGen/MachineOperand.h')
| -rw-r--r-- | include/llvm/CodeGen/MachineOperand.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h index 07d886d7d7..a4db391ea9 100644 --- a/include/llvm/CodeGen/MachineOperand.h +++ b/include/llvm/CodeGen/MachineOperand.h @@ -87,6 +87,10 @@ private: /// model the GCC inline asm '&' constraint modifier. bool IsEarlyClobber : 1; + /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo, + /// not a real instruction. Such uses should be ignored during codegen. + bool IsDebug : 1; + /// ParentMI - This is the instruction that this operand is embedded into. /// This is valid for all operand types, when the operand is in an instr. MachineInstr *ParentMI; @@ -214,6 +218,12 @@ public: return IsEarlyClobber; } + bool isDebug() const { + assert(isReg() && "Wrong MachineOperand accessor"); + assert(!isDef() && "Wrong MachineOperand accessor"); + return IsDebug; + } + /// getNextOperandForReg - Return the next MachineOperand in the function that /// uses or defines this register. MachineOperand *getNextOperandForReg() const { @@ -388,7 +398,8 @@ public: bool isKill = false, bool isDead = false, bool isUndef = false, bool isEarlyClobber = false, - unsigned SubReg = 0) { + unsigned SubReg = 0, + bool isDebug = false) { MachineOperand Op(MachineOperand::MO_Register); Op.IsDef = isDef; Op.IsImp = isImp; @@ -396,6 +407,7 @@ public: Op.IsDead = isDead; Op.IsUndef = isUndef; Op.IsEarlyClobber = isEarlyClobber; + Op.IsDebug = isDebug; Op.Contents.Reg.RegNo = Reg; Op.Contents.Reg.Prev = 0; Op.Contents.Reg.Next = 0; |