diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/tailcallfp2.ll | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9b7f6fc6ae..88e2fa15ee 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2091,7 +2091,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, // tailcall must happen after callee-saved registers are poped. // FIXME: Give it a special register class that contains caller-saved // register instead? - unsigned TCReg = Is64Bit ? X86::R11 : X86::EAX; + unsigned TCReg = Is64Bit ? X86::R11 : X86::ECX; Chain = DAG.getCopyToReg(Chain, dl, DAG.getRegister(TCReg, getPointerTy()), Callee,InFlag); @@ -2145,7 +2145,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, } assert(((Callee.getOpcode() == ISD::Register && - (cast<RegisterSDNode>(Callee)->getReg() == X86::EAX || + (cast<RegisterSDNode>(Callee)->getReg() == X86::ECX || cast<RegisterSDNode>(Callee)->getReg() == X86::R11)) || Callee.getOpcode() == ISD::TargetExternalSymbol || Callee.getOpcode() == ISD::TargetGlobalAddress) && diff --git a/test/CodeGen/X86/tailcallfp2.ll b/test/CodeGen/X86/tailcallfp2.ll index 3841f51897..8bfae1bb8d 100644 --- a/test/CodeGen/X86/tailcallfp2.ll +++ b/test/CodeGen/X86/tailcallfp2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax} +; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%ecx} declare i32 @putchar(i32) |