diff options
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2008-09-17-CoalescerBug.ll | 17 |
2 files changed, 20 insertions, 1 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index e06eb161c0..0044f06d33 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -568,7 +568,9 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned CopySrcReg, CopyDstReg; if (TID.getNumDefs() == 1 && TID.getNumOperands() > 2 && tii_->isMoveInstr(*UseMI, CopySrcReg, CopyDstReg) && - CopySrcReg != CopyDstReg) { + CopySrcReg != CopyDstReg && + (TargetRegisterInfo::isVirtualRegister(CopyDstReg) || + allocatableRegs_[CopyDstReg])) { LiveInterval &LI = li_->getInterval(CopyDstReg); unsigned DefIdx = li_->getDefIndex(li_->getInstructionIndex(UseMI)); const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx); diff --git a/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll b/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll new file mode 100644 index 0000000000..b3ea6fc594 --- /dev/null +++ b/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin + +define void @gcov_exit() nounwind { +entry: + br i1 false, label %bb24, label %bb33.thread + +bb24: ; preds = %entry + br label %bb39 + +bb33.thread: ; preds = %entry + %0 = alloca i8, i32 0 ; <i8*> [#uses=1] + br label %bb39 + +bb39: ; preds = %bb33.thread, %bb24 + %.reg2mem.0 = phi i8* [ %0, %bb33.thread ], [ null, %bb24 ] ; <i8*> [#uses=0] + ret void +} |