diff options
-rw-r--r-- | include/llvm/CodeGen/MachinePassRegistry.h | 1 | ||||
-rw-r--r-- | include/llvm/CodeGen/ScheduleDAG.h | 5 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 10 |
4 files changed, 9 insertions, 9 deletions
diff --git a/include/llvm/CodeGen/MachinePassRegistry.h b/include/llvm/CodeGen/MachinePassRegistry.h index 64d364e224..4bb34b02e5 100644 --- a/include/llvm/CodeGen/MachinePassRegistry.h +++ b/include/llvm/CodeGen/MachinePassRegistry.h @@ -19,7 +19,6 @@ #define LLVM_CODEGEN_MACHINEPASSREGISTRY_H #include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/Support/CommandLine.h" namespace llvm { diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index 86e08fe9d9..e205306fa7 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -16,6 +16,7 @@ #define LLVM_CODEGEN_SCHEDULEDAG_H #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallSet.h" namespace llvm { @@ -153,7 +154,7 @@ namespace llvm { public: virtual ~SchedulingPriorityQueue() {} - virtual void initNodes(std::map<SDNode*, SUnit*> &SUMap, + virtual void initNodes(DenseMap<SDNode*, SUnit*> &SUMap, std::vector<SUnit> &SUnits) = 0; virtual void releaseState() = 0; @@ -180,7 +181,7 @@ namespace llvm { MachineConstantPool *ConstPool; // Target constant pool std::vector<SUnit*> Sequence; // The schedule. Null SUnit*'s // represent noop instructions. - std::map<SDNode*, SUnit*> SUnitMap; // SDNode to SUnit mapping (n -> 1). + DenseMap<SDNode*, SUnit*> SUnitMap; // SDNode to SUnit mapping (n -> 1). std::vector<SUnit> SUnits; // The scheduling units. SmallSet<SDNode*, 16> CommuteSet; // Nodes the should be commuted. diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp index d21ef34c64..dbbf3f94fb 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp @@ -328,7 +328,7 @@ public: LatencyPriorityQueue() : Queue(latency_sort(this)) { } - void initNodes(std::map<SDNode*, SUnit*> &sumap, + void initNodes(DenseMap<SDNode*, SUnit*> &sumap, std::vector<SUnit> &sunits) { SUnits = &sunits; // Calculate node priorities. diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 2d1e6a3df9..66edfbce4e 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -430,7 +430,7 @@ namespace { RegReductionPriorityQueue() : Queue(SF(this)) {} - virtual void initNodes(std::map<SDNode*, SUnit*> &sumap, + virtual void initNodes(DenseMap<SDNode*, SUnit*> &sumap, std::vector<SUnit> &sunits) {} virtual void releaseState() {} @@ -464,7 +464,7 @@ namespace { class VISIBILITY_HIDDEN BURegReductionPriorityQueue : public RegReductionPriorityQueue<SF> { // SUnitMap SDNode to SUnit mapping (n -> 1). - std::map<SDNode*, SUnit*> *SUnitMap; + DenseMap<SDNode*, SUnit*> *SUnitMap; // SUnits - The SUnits for the current graph. const std::vector<SUnit> *SUnits; @@ -477,7 +477,7 @@ namespace { BURegReductionPriorityQueue(const TargetInstrInfo *tii) : TII(tii) {} - void initNodes(std::map<SDNode*, SUnit*> &sumap, + void initNodes(DenseMap<SDNode*, SUnit*> &sumap, std::vector<SUnit> &sunits) { SUnitMap = &sumap; SUnits = &sunits; @@ -541,7 +541,7 @@ namespace { template<class SF> class TDRegReductionPriorityQueue : public RegReductionPriorityQueue<SF> { // SUnitMap SDNode to SUnit mapping (n -> 1). - std::map<SDNode*, SUnit*> *SUnitMap; + DenseMap<SDNode*, SUnit*> *SUnitMap; // SUnits - The SUnits for the current graph. const std::vector<SUnit> *SUnits; @@ -552,7 +552,7 @@ namespace { public: TDRegReductionPriorityQueue() {} - void initNodes(std::map<SDNode*, SUnit*> &sumap, + void initNodes(DenseMap<SDNode*, SUnit*> &sumap, std::vector<SUnit> &sunits) { SUnitMap = &sumap; SUnits = &sunits; |