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| author | Craig Topper <craig.topper@gmail.com> | 2011-10-16 03:51:13 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-10-16 03:51:13 +0000 |
| commit | 17730847d59c919d97f097d46a3fcba1888e5300 (patch) | |
| tree | e953de771db6fdc42842e707c1124c6d462265b9 /utils/TableGen/X86RecognizableInstr.h | |
| parent | 4025061b8a31e612af17bd9548b35e1918135291 (diff) | |
| download | external_llvm-17730847d59c919d97f097d46a3fcba1888e5300.tar.gz external_llvm-17730847d59c919d97f097d46a3fcba1888e5300.tar.bz2 external_llvm-17730847d59c919d97f097d46a3fcba1888e5300.zip | |
Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142105 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/X86RecognizableInstr.h')
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.h b/utils/TableGen/X86RecognizableInstr.h index 4441597827..7ed820b80d 100644 --- a/utils/TableGen/X86RecognizableInstr.h +++ b/utils/TableGen/X86RecognizableInstr.h @@ -70,7 +70,9 @@ private: bool Is64Bit; // Whether the instruction has the predicate "In32BitMode" bool Is32Bit; - + // Whether the instruction is BEXTR + bool IsBEXTR; + /// The instruction name as listed in the tables std::string Name; /// The AT&T AsmString for the instruction |