Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f

1 files changed, 3 insertions, 3 deletions

diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp
index 3a3f836639..154f96d3d0 100644
--- a/utils/TableGen/FastISelEmitter.cpp
+++ b/utils/TableGen/FastISelEmitter.cpp
@@ -188,7 +188,7 @@ struct OperandsSignature {
       return true;
     }
 
-    const CodeGenRegisterClass *DstRC = 0;
+    const CodeGenRegisterClass *DstRC = nullptr;
 
     for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
       TreePatternNode *Op = InstPatNode->getChild(i);
@@ -252,7 +252,7 @@ struct OperandsSignature {
       Record *OpLeafRec = OpDI->getDef();
 
       // For now, the only other thing we accept is register operands.
-      const CodeGenRegisterClass *RC = 0;
+      const CodeGenRegisterClass *RC = nullptr;
       if (OpLeafRec->isSubClassOf("RegisterOperand"))
         OpLeafRec = OpLeafRec->getValueAsDef("RegClass");
       if (OpLeafRec->isSubClassOf("RegisterClass"))
@@ -459,7 +459,7 @@ void FastISelMap::collectPatterns(CodeGenDAGPatterns &CGP) {
 
     // For now, ignore instructions where the first operand is not an
     // output register.
-    const CodeGenRegisterClass *DstRC = 0;
+    const CodeGenRegisterClass *DstRC = nullptr;
     std::string SubRegNo;
     if (Op->getName() != "EXTRACT_SUBREG") {
       Record *Op0Rec = II.Operands[0].Rec;