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| author | Andrew Trick <atrick@apple.com> | 2011-09-20 03:17:40 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2011-09-20 03:17:40 +0000 |
| commit | 4815d56bb2c356a610f46753c5f1cefafa113b21 (patch) | |
| tree | f20bda385ee47a25a89750115d226db214967be9 /utils/TableGen/CodeGenInstruction.cpp | |
| parent | 3af7a67629292840f0dbae8fad4e333b009e69dd (diff) | |
| download | external_llvm-4815d56bb2c356a610f46753c5f1cefafa113b21.tar.gz external_llvm-4815d56bb2c356a610f46753c5f1cefafa113b21.tar.bz2 external_llvm-4815d56bb2c356a610f46753c5f1cefafa113b21.zip | |
ARM isel bug fix for adds/subs operands.
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenInstruction.cpp')
| -rw-r--r-- | utils/TableGen/CodeGenInstruction.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp index 4b252774f0..b4f9d15071 100644 --- a/utils/TableGen/CodeGenInstruction.cpp +++ b/utils/TableGen/CodeGenInstruction.cpp @@ -309,7 +309,6 @@ CodeGenInstruction::CodeGenInstruction(Record *R) : TheDef(R), Operands(R) { isReMaterializable = R->getValueAsBit("isReMaterializable"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomInserter = R->getValueAsBit("usesCustomInserter"); - hasPostISelHook = R->getValueAsBit("hasPostISelHook"); hasCtrlDep = R->getValueAsBit("hasCtrlDep"); isNotDuplicable = R->getValueAsBit("isNotDuplicable"); hasSideEffects = R->getValueAsBit("hasSideEffects"); |