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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-01 01:06:44 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-01 01:06:44 +0000 |
| commit | 8c3dccde92e50f5be7d14cef2a6db34ea6ae2bc0 (patch) | |
| tree | 7ec3b3c5a30b24dd7abd26539d400653aad631a6 /test | |
| parent | 1854e1455af3fdcecdbccd83ddf45cd1ae662aeb (diff) | |
| download | external_llvm-8c3dccde92e50f5be7d14cef2a6db34ea6ae2bc0.tar.gz external_llvm-8c3dccde92e50f5be7d14cef2a6db34ea6ae2bc0.tar.bz2 external_llvm-8c3dccde92e50f5be7d14cef2a6db34ea6ae2bc0.zip | |
Simplify REG_SEQUENCE lowering.
The TwoAddressInstructionPass takes the machine code out of SSA form by
expanding REG_SEQUENCE instructions into copies. It is no longer
necessary to rewrite the registers used by a REG_SEQUENCE instruction
because the new coalescer algorithm can do it now.
REG_SEQUENCE is just converted to a sequence of sub-register copies now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169067 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/subreg-remat.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/subreg-remat.ll b/test/CodeGen/ARM/subreg-remat.ll index 455bfce0f2..1bc0315354 100644 --- a/test/CodeGen/ARM/subreg-remat.ll +++ b/test/CodeGen/ARM/subreg-remat.ll @@ -12,7 +12,7 @@ target triple = "thumbv7-apple-ios" ; ; CHECK: f1 ; CHECK: vmov d0, r0, r0 -; CHECK: vldr s0, LCPI +; CHECK: vldr s1, LCPI ; The vector must be spilled: ; CHECK: vstr d0, ; CHECK: asm clobber d0 @@ -20,8 +20,8 @@ target triple = "thumbv7-apple-ios" ; CHECK: vldr [[D16:d[0-9]+]], ; CHECK: vstr [[D16]], [r1] define void @f1(float %x, <2 x float>* %p) { - %v1 = insertelement <2 x float> undef, float %x, i32 1 - %v2 = insertelement <2 x float> %v1, float 0x400921FB60000000, i32 0 + %v1 = insertelement <2 x float> undef, float %x, i32 0 + %v2 = insertelement <2 x float> %v1, float 0x400921FB60000000, i32 1 %y = call double asm sideeffect "asm clobber $0", "=w,0,~{d1},~{d2},~{d3},~{d4},~{d5},~{d6},~{d7},~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15},~{d16},~{d17},~{d18},~{d19},~{d20},~{d21},~{d22},~{d23},~{d24},~{d25},~{d26},~{d27},~{d28},~{d29},~{d30},~{d31}"(<2 x float> %v2) nounwind store <2 x float> %v2, <2 x float>* %p, align 8 ret void |