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| author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
| commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
| tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /test/CodeGen/ARM64/simd-scalar-to-vector.ll | |
| parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
| download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip | |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/CodeGen/ARM64/simd-scalar-to-vector.ll')
| -rw-r--r-- | test/CodeGen/ARM64/simd-scalar-to-vector.ll | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/test/CodeGen/ARM64/simd-scalar-to-vector.ll b/test/CodeGen/ARM64/simd-scalar-to-vector.ll deleted file mode 100644 index 6c0b840a5c..0000000000 --- a/test/CodeGen/ARM64/simd-scalar-to-vector.ll +++ /dev/null @@ -1,22 +0,0 @@ -; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s -; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -O0 | FileCheck %s --check-prefix=CHECK-FAST - -define <16 x i8> @foo(<16 x i8> %a) nounwind optsize readnone ssp { -; CHECK: uaddlv.16b h0, v0 -; CHECK: rshrn.8b v0, v0, #4 -; CHECK: dup.16b v0, v0[0] -; CHECK: ret - -; CHECK-FAST: uaddlv.16b -; CHECK-FAST: rshrn.8b -; CHECK-FAST: dup.16b - %tmp = tail call i32 @llvm.arm64.neon.uaddlv.i32.v16i8(<16 x i8> %a) nounwind - %tmp1 = trunc i32 %tmp to i16 - %tmp2 = insertelement <8 x i16> undef, i16 %tmp1, i32 0 - %tmp3 = tail call <8 x i8> @llvm.arm64.neon.rshrn.v8i8(<8 x i16> %tmp2, i32 4) - %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <16 x i32> zeroinitializer - ret <16 x i8> %tmp4 -} - -declare <8 x i8> @llvm.arm64.neon.rshrn.v8i8(<8 x i16>, i32) nounwind readnone -declare i32 @llvm.arm64.neon.uaddlv.i32.v16i8(<16 x i8>) nounwind readnone |