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author | Stephen Lin <stephenwlin@gmail.com> | 2013-07-13 20:38:47 +0000 |
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committer | Stephen Lin <stephenwlin@gmail.com> | 2013-07-13 20:38:47 +0000 |
commit | b4dc0233c9f70e8cf946822811f233bb613a02e9 (patch) | |
tree | 6cb47482e15d250ae95e5c6c96abd2afb56f6fca /test/CodeGen/ARM/shifter_operand.ll | |
parent | ae4e1a94e3fb7d1d2d0eec6eb7d04b74326c8453 (diff) | |
download | external_llvm-b4dc0233c9f70e8cf946822811f233bb613a02e9.tar.gz external_llvm-b4dc0233c9f70e8cf946822811f233bb613a02e9.tar.bz2 external_llvm-b4dc0233c9f70e8cf946822811f233bb613a02e9.zip |
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
This was done with the following sed invocation to catch label lines demarking function boundaries:
sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll
which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186258 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/shifter_operand.ll')
-rw-r--r-- | test/CodeGen/ARM/shifter_operand.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll index eb971ff72e..f14adcae66 100644 --- a/test/CodeGen/ARM/shifter_operand.ll +++ b/test/CodeGen/ARM/shifter_operand.ll @@ -4,10 +4,10 @@ define i32 @test1(i32 %X, i32 %Y, i8 %sh) { -; A8: test1: +; A8-LABEL: test1: ; A8: add r0, r0, r1, lsl r2 -; A9: test1: +; A9-LABEL: test1: ; A9: add r0, r0, r1, lsl r2 %shift.upgrd.1 = zext i8 %sh to i32 %A = shl i32 %Y, %shift.upgrd.1 @@ -16,10 +16,10 @@ define i32 @test1(i32 %X, i32 %Y, i8 %sh) { } define i32 @test2(i32 %X, i32 %Y, i8 %sh) { -; A8: test2: +; A8-LABEL: test2: ; A8: bic r0, r0, r1, asr r2 -; A9: test2: +; A9-LABEL: test2: ; A9: bic r0, r0, r1, asr r2 %shift.upgrd.2 = zext i8 %sh to i32 %A = ashr i32 %Y, %shift.upgrd.2 @@ -30,12 +30,12 @@ define i32 @test2(i32 %X, i32 %Y, i8 %sh) { define i32 @test3(i32 %base, i32 %base2, i32 %offset) { entry: -; A8: test3: +; A8-LABEL: test3: ; A8: ldr r0, [r0, r2, lsl #2] ; A8: ldr r1, [r1, r2, lsl #2] ; lsl #2 is free -; A9: test3: +; A9-LABEL: test3: ; A9: ldr r0, [r0, r2, lsl #2] ; A9: ldr r1, [r1, r2, lsl #2] %tmp1 = shl i32 %offset, 2 @@ -53,13 +53,13 @@ declare i8* @malloc(...) define fastcc void @test4(i16 %addr) nounwind { entry: -; A8: test4: +; A8-LABEL: test4: ; A8: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2] ; A8-NOT: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2]! ; A8: str [[REG]], [r0, r1, lsl #2] ; A8-NOT: str [[REG]], [r0] -; A9: test4: +; A9-LABEL: test4: ; A9: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2] ; A9-NOT: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2]! ; A9: str [[REG]], [r0, r1, lsl #2] |