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| author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
| commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
| tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /test/CodeGen/ARM/long_shift.ll | |
| parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
| download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip | |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'test/CodeGen/ARM/long_shift.ll')
| -rw-r--r-- | test/CodeGen/ARM/long_shift.ll | 58 |
1 files changed, 40 insertions, 18 deletions
diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll index 48b0ba7eca..3ec5fa41aa 100644 --- a/test/CodeGen/ARM/long_shift.ll +++ b/test/CodeGen/ARM/long_shift.ll @@ -1,11 +1,16 @@ -; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s +; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE +; RUN: llc -mtriple=armeb-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE define i64 @f0(i64 %A, i64 %B) { ; CHECK-LABEL: f0: -; CHECK: lsrs r3, r3, #1 -; CHECK-NEXT: rrx r2, r2 -; CHECK-NEXT: subs r0, r0, r2 -; CHECK-NEXT: sbc r1, r1, r3 +; CHECK-LE: lsrs r3, r3, #1 +; CHECK-LE-NEXT: rrx r2, r2 +; CHECK-LE-NEXT: subs r0, r0, r2 +; CHECK-LE-NEXT: sbc r1, r1, r3 +; CHECK-BE: lsrs r2, r2, #1 +; CHECK-BE-NEXT: rrx r3, r3 +; CHECK-BE-NEXT: subs r1, r1, r3 +; CHECK-BE-NEXT: sbc r0, r0, r2 %tmp = bitcast i64 %A to i64 %tmp2 = lshr i64 %B, 1 %tmp3 = sub i64 %tmp, %tmp2 @@ -14,7 +19,8 @@ define i64 @f0(i64 %A, i64 %B) { define i32 @f1(i64 %x, i64 %y) { ; CHECK-LABEL: f1: -; CHECK: lsl{{.*}}r2 +; CHECK-LE: lsl{{.*}}r2 +; CHECK-BE: lsl{{.*}}r3 %a = shl i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b @@ -22,12 +28,20 @@ define i32 @f1(i64 %x, i64 %y) { define i32 @f2(i64 %x, i64 %y) { ; CHECK-LABEL: f2: -; CHECK: lsr{{.*}}r2 -; CHECK-NEXT: rsb r3, r2, #32 -; CHECK-NEXT: sub r2, r2, #32 -; CHECK-NEXT: orr r0, r0, r1, lsl r3 -; CHECK-NEXT: cmp r2, #0 -; CHECK-NEXT: asrge r0, r1, r2 +; CHECK-LE: lsr{{.*}}r2 +; CHECK-LE-NEXT: rsb r3, r2, #32 +; CHECK-LE-NEXT: sub r2, r2, #32 +; CHECK-LE-NEXT: orr r0, r0, r1, lsl r3 +; CHECK-LE-NEXT: cmp r2, #0 +; CHECK-LE-NEXT: asrge r0, r1, r2 + +; CHECK-BE: lsr{{.*}}r3 +; CHECK-BE-NEXT: rsb r2, r3, #32 +; CHECK-BE-NEXT: orr r1, r1, r0, lsl r2 +; CHECK-BE-NEXT: sub r2, r3, #32 +; CHECK-BE-NEXT: cmp r2, #0 +; CHECK-BE-NEXT: asrge r1, r0, r2 + %a = ashr i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b @@ -35,12 +49,20 @@ define i32 @f2(i64 %x, i64 %y) { define i32 @f3(i64 %x, i64 %y) { ; CHECK-LABEL: f3: -; CHECK: lsr{{.*}}r2 -; CHECK-NEXT: rsb r3, r2, #32 -; CHECK-NEXT: sub r2, r2, #32 -; CHECK-NEXT: orr r0, r0, r1, lsl r3 -; CHECK-NEXT: cmp r2, #0 -; CHECK-NEXT: lsrge r0, r1, r2 +; CHECK-LE: lsr{{.*}}r2 +; CHECK-LE-NEXT: rsb r3, r2, #32 +; CHECK-LE-NEXT: sub r2, r2, #32 +; CHECK-LE-NEXT: orr r0, r0, r1, lsl r3 +; CHECK-LE-NEXT: cmp r2, #0 +; CHECK-LE-NEXT: lsrge r0, r1, r2 + +; CHECK-BE: lsr{{.*}}r3 +; CHECK-BE-NEXT: rsb r2, r3, #32 +; CHECK-BE-NEXT: orr r1, r1, r0, lsl r2 +; CHECK-BE-NEXT: sub r2, r3, #32 +; CHECK-BE-NEXT: cmp r2, #0 +; CHECK-BE-NEXT: lsrge r1, r0, r2 + %a = lshr i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b |