diff options
author | Dale Johannesen <dalej@apple.com> | 2007-09-28 01:08:20 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2007-09-28 01:08:20 +0000 |
commit | 317096ab3710fda0960be58804e9f80c800340f6 (patch) | |
tree | 212f900febeda8dca58c4b5bc7dfa6183aa24b08 /lib | |
parent | ef0ab932ef3b07016ffb827cd529d4787d7ed12e (diff) | |
download | external_llvm-317096ab3710fda0960be58804e9f80c800340f6.tar.gz external_llvm-317096ab3710fda0960be58804e9f80c800340f6.tar.bz2 external_llvm-317096ab3710fda0960be58804e9f80c800340f6.zip |
Add sqrt and powi intrinsics for long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Analysis/ConstantFolding.cpp | 6 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 17 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 6 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 |
4 files changed, 25 insertions, 6 deletions
diff --git a/lib/Analysis/ConstantFolding.cpp b/lib/Analysis/ConstantFolding.cpp index 6c828fa004..d68961580e 100644 --- a/lib/Analysis/ConstantFolding.cpp +++ b/lib/Analysis/ConstantFolding.cpp @@ -331,8 +331,14 @@ llvm::canConstantFoldCallTo(Function *F) { switch (F->getIntrinsicID()) { case Intrinsic::sqrt_f32: case Intrinsic::sqrt_f64: + case Intrinsic::sqrt_f80: + case Intrinsic::sqrt_f128: + case Intrinsic::sqrt_ppcf128: case Intrinsic::powi_f32: case Intrinsic::powi_f64: + case Intrinsic::powi_f80: + case Intrinsic::powi_f128: + case Intrinsic::powi_ppcf128: case Intrinsic::bswap: case Intrinsic::ctpop: case Intrinsic::ctlz: diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 509e2252f6..b976195847 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3044,7 +3044,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL; switch(Node->getOpcode()) { case ISD::FSQRT: - LC = VT == MVT::f32 ? RTLIB::SQRT_F32 : RTLIB::SQRT_F64; + LC = VT == MVT::f32 ? RTLIB::SQRT_F32 : + VT == MVT::f64 ? RTLIB::SQRT_F64 : RTLIB::SQRT_LD; break; case ISD::FSIN: LC = VT == MVT::f32 ? RTLIB::SIN_F32 : RTLIB::SIN_F64; @@ -3065,8 +3066,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; case ISD::FPOWI: { // We always lower FPOWI into a libcall. No target support it yet. - RTLIB::Libcall LC = Node->getValueType(0) == MVT::f32 - ? RTLIB::POWI_F32 : RTLIB::POWI_F64; + RTLIB::Libcall LC = + Node->getValueType(0) == MVT::f32 ? RTLIB::POWI_F32 : + Node->getValueType(0) == MVT::f64 ? RTLIB::POWI_F64 : + RTLIB::POWI_LD; SDOperand Dummy; Result = ExpandLibCall(TLI.getLibcallName(LC), Node, false/*sign irrelevant*/, Dummy); @@ -5688,8 +5691,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ Lo = ExpandLibCall(TLI.getLibcallName(RTLIB::FPROUND_F64_F32),Node,true,Hi); break; case ISD::FPOWI: - Lo = ExpandLibCall(TLI.getLibcallName((VT == MVT::f32) - ? RTLIB::POWI_F32 : RTLIB::POWI_F64), + Lo = ExpandLibCall(TLI.getLibcallName((VT == MVT::f32) ? RTLIB::POWI_F32 : + (VT == MVT::f64) ? RTLIB::POWI_F64 : + RTLIB::POWI_LD), Node, false, Hi); break; case ISD::FSQRT: @@ -5698,7 +5702,8 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL; switch(Node->getOpcode()) { case ISD::FSQRT: - LC = (VT == MVT::f32) ? RTLIB::SQRT_F32 : RTLIB::SQRT_F64; + LC = (VT == MVT::f32) ? RTLIB::SQRT_F32 : + (VT == MVT::f64) ? RTLIB::SQRT_F64 : RTLIB::SQRT_LD; break; case ISD::FSIN: LC = (VT == MVT::f32) ? RTLIB::SIN_F32 : RTLIB::SIN_F64; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index f582c8f1d7..23ad28f33b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2798,12 +2798,18 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { case Intrinsic::sqrt_f32: case Intrinsic::sqrt_f64: + case Intrinsic::sqrt_f80: + case Intrinsic::sqrt_f128: + case Intrinsic::sqrt_ppcf128: setValue(&I, DAG.getNode(ISD::FSQRT, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1)))); return 0; case Intrinsic::powi_f32: case Intrinsic::powi_f64: + case Intrinsic::powi_f80: + case Intrinsic::powi_f128: + case Intrinsic::powi_ppcf128: setValue(&I, DAG.getNode(ISD::FPOWI, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1)), diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 0898173ef9..f87ebe40a1 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -58,8 +58,10 @@ static void InitLibcallNames(const char **Names) { Names[RTLIB::NEG_F64] = "__negdf2"; Names[RTLIB::POWI_F32] = "__powisf2"; Names[RTLIB::POWI_F64] = "__powidf2"; + Names[RTLIB::POWI_LD] = "__powixf2"; Names[RTLIB::SQRT_F32] = "sqrtf"; Names[RTLIB::SQRT_F64] = "sqrt"; + Names[RTLIB::SQRT_LD] = "sqrtl"; Names[RTLIB::SIN_F32] = "sinf"; Names[RTLIB::SIN_F64] = "sin"; Names[RTLIB::COS_F32] = "cosf"; |