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| author | Daniel Dunbar <daniel@zuster.org> | 2010-06-23 17:09:26 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2010-06-23 17:09:26 +0000 |
| commit | cbe762b5d165c565feb98b745e93b71d208a1e36 (patch) | |
| tree | 0f6f0b75c5f50a24a09c41e4224b54fc1c4c0123 /lib/Target/X86/X86ISelLowering.cpp | |
| parent | f1ab49e83abccd9f7b885e74172419249bd5fd8a (diff) | |
| download | external_llvm-cbe762b5d165c565feb98b745e93b71d208a1e36.tar.gz external_llvm-cbe762b5d165c565feb98b745e93b71d208a1e36.tar.bz2 external_llvm-cbe762b5d165c565feb98b745e93b71d208a1e36.zip | |
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index dd1c4a179b..bd95c85629 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9627,10 +9627,8 @@ static SDValue PerformOrCombine(SDNode *N, SelectionDAG &DAG, if (ShAmt1.getOpcode() == ISD::SUB) { SDValue Sum = ShAmt1.getOperand(0); if (ConstantSDNode *SumC = dyn_cast<ConstantSDNode>(Sum)) { - SDValue ShAmt1Op1 = ShAmt1.getOperand(1); - if (ShAmt1Op1.getNode()->getOpcode() == ISD::TRUNCATE) - ShAmt1Op1 = ShAmt1Op1.getOperand(0); - if (SumC->getSExtValue() == Bits && ShAmt1Op1 == ShAmt0) + if (SumC->getSExtValue() == Bits && + ShAmt1.getOperand(1) == ShAmt0) return DAG.getNode(Opc, DL, VT, Op0, Op1, DAG.getNode(ISD::TRUNCATE, DL, |