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| author | Chris Lattner <sabre@nondot.org> | 2004-02-12 17:53:22 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-02-12 17:53:22 +0000 |
| commit | 915e5e56d7cc8e140d33202eed6244ed0356ed1f (patch) | |
| tree | 4591d2b30c5a36850de5ccb513f9ccc15ce8ee16 /lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 33aec9efa926690c1cbd92314a92a8aec563b329 (diff) | |
| download | external_llvm-915e5e56d7cc8e140d33202eed6244ed0356ed1f.tar.gz external_llvm-915e5e56d7cc8e140d33202eed6244ed0356ed1f.tar.bz2 external_llvm-915e5e56d7cc8e140d33202eed6244ed0356ed1f.zip | |
Add support for the rep movs[bwd] instructions, and emit them when code
generating the llvm.memcpy intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11351 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index be6319cd0c..83e5e102d5 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -470,6 +470,9 @@ void Emitter::emitInstruction(MachineInstr &MI) { unsigned Opcode = MI.getOpcode(); const TargetInstrDescriptor &Desc = II->get(Opcode); + // Emit the repeat opcode prefix as needed. + if ((Desc.TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3); + // Emit instruction prefixes if necessary if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size... @@ -477,6 +480,7 @@ void Emitter::emitInstruction(MachineInstr &MI) { case X86II::TB: MCE.emitByte(0x0F); // Two-byte opcode prefix break; + case X86II::REP: break; // already handled. case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB: case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF: MCE.emitByte(0xD8+ |