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author | Chris Lattner <sabre@nondot.org> | 2010-07-08 23:46:44 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-07-08 23:46:44 +0000 |
commit | eed3f01d1560592c7e0f7545a8c128bfe39e879d (patch) | |
tree | 4706d1f82d62567d32ad048a7d6e50a08c56f40e /lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp | |
parent | fed1703144c218146aa0c1aab7c7b8a844b332ed (diff) | |
download | external_llvm-eed3f01d1560592c7e0f7545a8c128bfe39e879d.tar.gz external_llvm-eed3f01d1560592c7e0f7545a8c128bfe39e879d.tar.bz2 external_llvm-eed3f01d1560592c7e0f7545a8c128bfe39e879d.zip |
Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp')
-rw-r--r-- | lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp b/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp index 7e0a9bb891..a632047f65 100644 --- a/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp +++ b/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp @@ -81,12 +81,19 @@ void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, } } -void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op, - raw_ostream &O) { +void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op, + raw_ostream &O) { const MCOperand &BaseReg = MI->getOperand(Op); unsigned ScaleVal = MI->getOperand(Op+1).getImm(); const MCOperand &IndexReg = MI->getOperand(Op+2); const MCOperand &DispSpec = MI->getOperand(Op+3); + const MCOperand &SegReg = MI->getOperand(Op+4); + + // If this has a segment register, print it. + if (SegReg.getReg()) { + printOperand(MI, Op+4, O); + O << ':'; + } O << '['; @@ -104,7 +111,7 @@ void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op, NeedPlus = true; } - + if (!DispSpec.isImm()) { if (NeedPlus) O << " + "; assert(DispSpec.isExpr() && "non-immediate displacement for LEA?"); @@ -126,13 +133,3 @@ void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op, O << ']'; } - -void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op, - raw_ostream &O) { - // If this has a segment register, print it. - if (MI->getOperand(Op+4).getReg()) { - printOperand(MI, Op+4, O); - O << ':'; - } - printLeaMemReference(MI, Op, O); -} |