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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-19 06:37:02 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-19 06:37:02 +0000 |
commit | 439661395fd2a2a832dba01c65bc88718528313c (patch) | |
tree | e8091900c4d2f3278f5237358edeb7f22275cb77 /lib/Target/Mips | |
parent | 939ece1b5c6c2f142476b477daa573046fa1b8da (diff) | |
download | external_llvm-439661395fd2a2a832dba01c65bc88718528313c.tar.gz external_llvm-439661395fd2a2a832dba01c65bc88718528313c.tar.bz2 external_llvm-439661395fd2a2a832dba01c65bc88718528313c.zip |
Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 21 | ||||
-rw-r--r-- | lib/Target/Mips/MipsTargetMachine.cpp | 19 | ||||
-rw-r--r-- | lib/Target/Mips/MipsTargetMachine.h | 10 |
3 files changed, 32 insertions, 18 deletions
diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 3a2ed8a762..b83a69d06a 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -77,3 +77,24 @@ extern "C" void LLVMInitializeMipsMCAsmInfo() { RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); } + +MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + if (RM == Reloc::Default) { + // Abicall enables PIC by default + if (TT.find("mipsallegrex") != std::string::npos || + TT.find("psp") != std::string::npos) + RM = Reloc::Static; + else + RM = Reloc::PIC_; + } + X->InitMCCodeGenInfo(RM); + return X; +} + +extern "C" void LLVMInitializeMipsMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, + createMipsMCCodeGenInfo); + TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, + createMipsMCCodeGenInfo); +} diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index 20b9f4ea38..a195a48961 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -31,10 +31,10 @@ extern "C" void LLVMInitializeMipsTarget() { // an easier handling. // Using CodeModel::Large enables different CALL behavior. MipsTargetMachine:: -MipsTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS, +MipsTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM, bool isLittle=false): - LLVMTargetMachine(T, TT, CPU, FS), + LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS, isLittle), DataLayout(isLittle ? std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") : @@ -42,19 +42,12 @@ MipsTargetMachine(const Target &T, const std::string &TT, InstrInfo(*this), FrameLowering(Subtarget), TLInfo(*this), TSInfo(*this) { - // Abicall enables PIC by default - if (getRelocationModel() == Reloc::Default) { - if (Subtarget.isABI_O32()) - setRelocationModel(Reloc::PIC_); - else - setRelocationModel(Reloc::Static); - } } MipselTargetMachine:: -MipselTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS) : - MipsTargetMachine(T, TT, CPU, FS, true) {} +MipselTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM) : + MipsTargetMachine(T, TT, CPU, FS, RM, true) {} // Install an instruction selector pass using // the ISelDag to gen Mips code. diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h index a021af2ff1..c1671e69bb 100644 --- a/lib/Target/Mips/MipsTargetMachine.h +++ b/lib/Target/Mips/MipsTargetMachine.h @@ -34,9 +34,9 @@ namespace llvm { MipsTargetLowering TLInfo; MipsSelectionDAGInfo TSInfo; public: - MipsTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS, - bool isLittle); + MipsTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM, bool isLittle); virtual const MipsInstrInfo *getInstrInfo() const { return &InstrInfo; } @@ -73,8 +73,8 @@ namespace llvm { /// class MipselTargetMachine : public MipsTargetMachine { public: - MipselTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + MipselTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); }; } // End llvm namespace |