diff options
| author | Patrik Hagglund <patrik.h.hagglund@ericsson.com> | 2012-12-11 11:14:33 +0000 |
|---|---|---|
| committer | Patrik Hagglund <patrik.h.hagglund@ericsson.com> | 2012-12-11 11:14:33 +0000 |
| commit | 34525f9ac098c1c6bc9002886d6da3039a284fd2 (patch) | |
| tree | b4cb498a55dda76f1a134df25d3c587cc35b2f83 /lib/Target/Mips/MipsISelLowering.cpp | |
| parent | 7550f96b2f3a5e187f737ddad45563962fbd509c (diff) | |
| download | external_llvm-34525f9ac098c1c6bc9002886d6da3039a284fd2.tar.gz external_llvm-34525f9ac098c1c6bc9002886d6da3039a284fd2.tar.bz2 external_llvm-34525f9ac098c1c6bc9002886d6da3039a284fd2.zip | |
Revert EVT->MVT changes, r169836-169851, due to buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169854 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index da99dd06e0..619ae077b3 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -2155,7 +2155,7 @@ SDValue MipsTargetLowering::LowerRETURNADDR(SDValue Op, MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); - MVT VT = Op.getSimpleValueType(); + EVT VT = Op.getValueType(); unsigned RA = IsN64 ? Mips::RA_64 : Mips::RA; MFI->setReturnAddressIsTaken(true); @@ -3655,7 +3655,7 @@ copyByValRegs(SDValue Chain, DebugLoc DL, std::vector<SDValue> &OutChains, return; // Copy arg registers. - MVT RegTy = MVT::getIntegerVT(CC.regSize() * 8); + EVT RegTy = MVT::getIntegerVT(CC.regSize() * 8); const TargetRegisterClass *RC = getRegClassFor(RegTy); for (unsigned I = 0; I < ByVal.NumRegs; ++I) { @@ -3777,7 +3777,7 @@ MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains, const CCState &CCInfo = CC.getCCInfo(); unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs, NumRegs); unsigned RegSize = CC.regSize(); - MVT RegTy = MVT::getIntegerVT(RegSize * 8); + EVT RegTy = MVT::getIntegerVT(RegSize * 8); const TargetRegisterClass *RC = getRegClassFor(RegTy); MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); |