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author | Torok Edwin <edwintorok@gmail.com> | 2009-07-14 16:55:14 +0000 |
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committer | Torok Edwin <edwintorok@gmail.com> | 2009-07-14 16:55:14 +0000 |
commit | c23197a26f34f559ea9797de51e187087c039c42 (patch) | |
tree | bf497ec9a02cd2fc0b64e3e58eff037a719a854d /lib/Target/CellSPU/SPUInstrInfo.cpp | |
parent | 1f316e321a8f2fa0e193c5444584a67a8aabe9a8 (diff) | |
download | external_llvm-c23197a26f34f559ea9797de51e187087c039c42.tar.gz external_llvm-c23197a26f34f559ea9797de51e187087c039c42.tar.bz2 external_llvm-c23197a26f34f559ea9797de51e187087c039c42.zip |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUInstrInfo.cpp')
-rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index eba1ca127c..26a4241819 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -314,7 +314,7 @@ SPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, } else if (RC == SPU::VECREGRegisterClass) { opc = (isValidFrameIdx) ? SPU::STQDv16i8 : SPU::STQXv16i8; } else { - LLVM_UNREACHABLE("Unknown regclass!"); + llvm_unreachable("Unknown regclass!"); } DebugLoc DL = DebugLoc::getUnknownLoc(); @@ -347,7 +347,7 @@ void SPUInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, } else if (RC == SPU::VECREGRegisterClass) { /* Opc = PPC::STVX; */ } else { - LLVM_UNREACHABLE("Unknown regclass!"); + llvm_unreachable("Unknown regclass!"); } DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)) @@ -383,7 +383,7 @@ SPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, } else if (RC == SPU::VECREGRegisterClass) { opc = (isValidFrameIdx) ? SPU::LQDv16i8 : SPU::LQXv16i8; } else { - LLVM_UNREACHABLE("Unknown regclass in loadRegFromStackSlot!"); + llvm_unreachable("Unknown regclass in loadRegFromStackSlot!"); } DebugLoc DL = DebugLoc::getUnknownLoc(); @@ -420,7 +420,7 @@ void SPUInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, } else if (RC == SPU::GPRCRegisterClass) { /* Opc = something else! */ } else { - LLVM_UNREACHABLE("Unknown regclass!"); + llvm_unreachable("Unknown regclass!"); } DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); |