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| author | Logan Chien <loganchien@google.com> | 2011-10-20 00:08:13 +0800 |
|---|---|---|
| committer | Logan Chien <loganchien@google.com> | 2011-10-20 00:09:35 +0800 |
| commit | 0ebc07a576037e4e36f68bf5cece32740ca120c0 (patch) | |
| tree | c2e40648043d01498ee25af839a071193561e425 /lib/Target/Alpha/AlphaISelLowering.cpp | |
| parent | 62383e889e0b06fd12a6b88311717cd33a1925c4 (diff) | |
| parent | cdd8e46bec4e975d00a5abea808d8eb4138515c5 (diff) | |
| download | external_llvm-0ebc07a576037e4e36f68bf5cece32740ca120c0.tar.gz external_llvm-0ebc07a576037e4e36f68bf5cece32740ca120c0.tar.bz2 external_llvm-0ebc07a576037e4e36f68bf5cece32740ca120c0.zip | |
Merge with LLVM upstream 2011/10/20 (r142530)
Conflicts:
lib/Support/Unix/Host.inc
Change-Id: Idc00db3b63912dca6348bddd9f8a1af2a8d5d147
Diffstat (limited to 'lib/Target/Alpha/AlphaISelLowering.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaISelLowering.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index de003fb4c6..3057eb8c57 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -49,6 +49,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) // Set up the TargetLowering object. //I am having problems with shr n i8 1 setBooleanContents(ZeroOrOneBooleanContent); + setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct? addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass); addRegisterClass(MVT::f64, Alpha::F8RCRegisterClass); @@ -153,6 +154,9 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) setOperationAction(ISD::JumpTable, MVT::i64, Custom); setOperationAction(ISD::JumpTable, MVT::i32, Custom); + setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); + setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand); + setStackPointerRegisterToSaveRestore(Alpha::R30); setJumpBufSize(272); @@ -160,10 +164,12 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) setMinFunctionAlignment(4); + setInsertFencesForAtomic(true); + computeRegisterProperties(); } -MVT::SimpleValueType AlphaTargetLowering::getSetCCResultType(EVT VT) const { +EVT AlphaTargetLowering::getSetCCResultType(EVT VT) const { return MVT::i64; } |