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| author | Tim Northover <tnorthover@apple.com> | 2013-06-10 23:20:58 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-06-10 23:20:58 +0000 |
| commit | 9bdd78501484a1add2d8a757fd29960dd9fc9de7 (patch) | |
| tree | a0de733750c030b3280711231515852051a38bcc /lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | |
| parent | 45dec48dc3725a8e5ca5cfdeeed941eea2e456f1 (diff) | |
| download | external_llvm-9bdd78501484a1add2d8a757fd29960dd9fc9de7.tar.gz external_llvm-9bdd78501484a1add2d8a757fd29960dd9fc9de7.tar.bz2 external_llvm-9bdd78501484a1add2d8a757fd29960dd9fc9de7.zip | |
ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one.
Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some
only support Thumb mode (M-class ones currently). This makes sure such CPUs
default to the correct mode and makes the AsmParser diagnose an attempt to
switch modes incorrectly.
rdar://14024354
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183710 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp')
| -rw-r--r-- | lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index 164f57b2d0..14fd03fad8 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -61,6 +61,7 @@ std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) { unsigned SubVer = TT[Idx]; if (SubVer >= '7' && SubVer <= '9') { if (Len >= Idx+2 && TT[Idx+1] == 'm') { + isThumb = true; if (NoCPU) // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass"; @@ -99,6 +100,7 @@ std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) { if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') ARMArchFeature = "+v6t2"; else if (Len >= Idx+2 && TT[Idx+1] == 'm') { + isThumb = true; if (NoCPU) // v6m: FeatureNoARM, FeatureMClass ARMArchFeature = "+v6,+noarm,+mclass"; |