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authorBenjamin Kramer <benny.kra@googlemail.com>2011-08-09 21:34:19 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2011-08-09 21:34:19 +0000
commit9bd7c2836eea4ba6484a1eabb38cd084f45fed94 (patch)
treedcbefc7aefdc0d19520c3057a78b029280d4689f /lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
parentad0d36b79ff6b13d0acb29d316517f55aab45f4d (diff)
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The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137151 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp')
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp10
1 files changed, 0 insertions, 10 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
index 0a4d671a4e..8cb0ccf380 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -165,11 +165,6 @@ namespace {
class ARMMCInstrAnalysis : public MCInstrAnalysis {
public:
ARMMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
- virtual bool isBranch(const MCInst &Inst) const {
- // Don't flag "bx lr" as a branch.
- return MCInstrAnalysis::isBranch(Inst) && (Inst.getOpcode() != ARM::BX ||
- Inst.getOperand(0).getReg() != ARM::LR);
- }
virtual bool isUnconditionalBranch(const MCInst &Inst) const {
// BCCs with the "always" predicate are unconditional branches.
@@ -185,11 +180,6 @@ public:
return MCInstrAnalysis::isConditionalBranch(Inst);
}
- virtual bool isReturn(const MCInst &Inst) const {
- // Recognize "bx lr" as return.
- return Inst.getOpcode() == ARM::BX && Inst.getOperand(0).getReg()==ARM::LR;
- }
-
uint64_t evaluateBranch(const MCInst &Inst, uint64_t Addr,
uint64_t Size) const {
// We only handle PCRel branches for now.