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author | Owen Anderson <resistor@mac.com> | 2011-09-21 23:44:46 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2011-09-21 23:44:46 +0000 |
commit | e1368729700f1a51ee5cf33431df985e232bcc68 (patch) | |
tree | ff2fa32c687e45bd5771ceb985e2fc86bea7bbb6 /lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | |
parent | 1dd4e56d5565d59e9d40ad9e088a05e06f4b70f8 (diff) | |
download | external_llvm-e1368729700f1a51ee5cf33431df985e232bcc68.tar.gz external_llvm-e1368729700f1a51ee5cf33431df985e232bcc68.tar.bz2 external_llvm-e1368729700f1a51ee5cf33431df985e232bcc68.zip |
Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140283 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp')
-rw-r--r-- | lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 16bb25ab29..251b447886 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -211,6 +211,29 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, } } +void ARMInstPrinter::printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { + const MCOperand &MO1 = MI->getOperand(OpNum); + if (MO1.isExpr()) + O << *MO1.getExpr(); + else if (MO1.isImm()) + O << "[pc, #" << MO1.getImm() << "]"; + else + llvm_unreachable("Unknown LDR label operand?"); +} + +void ARMInstPrinter::printT2AdrLabelOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { + const MCOperand &MO1 = MI->getOperand(OpNum); + if (MO1.isExpr()) + O << *MO1.getExpr(); + else if (MO1.isImm()) + O << "[pc, #" << MO1.getImm() << "]"; + else + llvm_unreachable("Unknown LDR label operand?"); +} + + // so_reg is a 4-operand unit corresponding to register forms of the A5.1 // "Addressing Mode 1 - Data-processing operands" forms. This includes: // REG 0 0 - e.g. R5 |