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| author | Owen Anderson <resistor@mac.com> | 2011-07-16 09:17:43 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-07-16 09:17:43 +0000 |
| commit | 91ddfc4723f5857e0124192d71e625a7926cbc70 (patch) | |
| tree | 424cebb2f56343c336cda132a9ec1469f46016a3 /lib/Target/ARM/Disassembler | |
| parent | af37cb53f4c2da6cc15fc994f2f7629b82506fb7 (diff) | |
| download | external_llvm-91ddfc4723f5857e0124192d71e625a7926cbc70.tar.gz external_llvm-91ddfc4723f5857e0124192d71e625a7926cbc70.tar.bz2 external_llvm-91ddfc4723f5857e0124192d71e625a7926cbc70.zip | |
Revert r135319 in an attempt to get to unbreak testers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135343 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h index 9c3ebca52c..834c6f6529 100644 --- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h @@ -479,7 +479,7 @@ static bool DisassembleThumb1DP(MCInst &MI, unsigned Opcode, uint32_t insn, // tBX: Rm // tBX_RET: 0 operand // tBX_RET_vararg: Rm -// tBLXr: Rm +// tBLXr_r9: Rm // tBRIND: Rm static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) { @@ -489,8 +489,8 @@ static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn, return true; // BX/BLX/tBRIND (indirect branch, i.e, mov pc, Rm) has 1 reg operand: Rm. - if (Opcode==ARM::tBLXr || Opcode==ARM::tBX || Opcode==ARM::tBRIND) { - if (Opcode == ARM::tBLXr) { + if (Opcode==ARM::tBLXr_r9 || Opcode==ARM::tBX || Opcode==ARM::tBRIND) { + if (Opcode == ARM::tBLXr_r9) { // Handling the two predicate operands before the reg operand. if (!B->DoPredicateOperands(MI, Opcode, insn, NumOps)) return false; @@ -1729,7 +1729,7 @@ static inline bool t2MiscCtrlInstr(uint32_t insn) { // Branches: t2TPsoft -> no operand // // A8.6.23 BL, BLX (immediate) -// Branches (defined in ARMInstrThumb.td): tBL, tBLXi -> imm operand +// Branches (defined in ARMInstrThumb.td): tBLr9, tBLXi_r9 -> imm operand // // A8.6.26 // t2BXJ -> Rn @@ -1844,7 +1844,7 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode, } // Some instructions have predicate operands first before the immediate. - if (Opcode == ARM::tBLXi || Opcode == ARM::tBL) { + if (Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) { // Handling the two predicate operands before the imm operand. if (B->DoPredicateOperands(MI, Opcode, insn, NumOps)) NumOpsAdded += 2; @@ -1867,10 +1867,10 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode, case ARM::t2Bcc: Offset = decodeImm32_B_EncodingT3(insn); break; - case ARM::tBL: + case ARM::tBLr9: Offset = decodeImm32_BL(insn); break; - case ARM::tBLXi: + case ARM::tBLXi_r9: Offset = decodeImm32_BLX(insn); break; } |