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authorOwen Anderson <resistor@mac.com>2011-07-18 23:25:34 +0000
committerOwen Anderson <resistor@mac.com>2011-07-18 23:25:34 +0000
commit565a0366974d82c3efe8a31e0ecc0609c67cad3e (patch)
tree28e16c0a589b368f975c4e30c1cf69373d28cde1 /lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
parentc8c3acfea439998da4fae895becce7c1468e3c63 (diff)
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Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135442 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h')
-rw-r--r--lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
index 9c3ebca52c..4a790a4ea7 100644
--- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
+++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
@@ -891,8 +891,8 @@ static bool DisassembleThumb1Misc(MCInst &MI, unsigned Opcode, uint32_t insn,
static bool DisassembleThumb1LdStMul(bool Ld, MCInst &MI, unsigned Opcode,
uint32_t insn, unsigned short NumOps,
unsigned &NumOpsAdded, BO B) {
- assert((Opcode == ARM::tLDMIA || Opcode == ARM::tLDMIA_UPD ||
- Opcode == ARM::tSTMIA_UPD) && "Unexpected opcode");
+ assert((Opcode == ARM::tLDMIA || Opcode == ARM::tSTMIA) &&
+ "Unexpected opcode");
unsigned tRt = getT1tRt(insn);
NumOpsAdded = 0;