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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-22 23:16:18 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-22 23:16:18 +0000 |
| commit | 4a5ffb399f841783c201c599b88d576757f1922e (patch) | |
| tree | 617da249fe89433aa1af7b1043521bed6c9bc7c5 /lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | |
| parent | 4428069f10ac6e7efb55826437c82428d4bbe03e (diff) | |
| download | external_llvm-4a5ffb399f841783c201c599b88d576757f1922e.tar.gz external_llvm-4a5ffb399f841783c201c599b88d576757f1922e.tar.bz2 external_llvm-4a5ffb399f841783c201c599b88d576757f1922e.zip | |
ARM SSAT instruction 5-bit immediate handling.
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h index 85d62be60c..7ad958f51a 100644 --- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h @@ -1609,8 +1609,6 @@ static bool DisassembleThumb2Sat(MCInst &MI, unsigned Opcode, uint32_t insn, decodeRs(insn)))); unsigned Pos = slice(insn, 4, 0); - if (Opcode == ARM::t2SSAT || Opcode == ARM::t2SSAT16) - Pos += 1; MI.addOperand(MCOperand::CreateImm(Pos)); MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::rGPRRegClassID, |