Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 99 insertions, 95 deletions

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 70b5d788b4..44fac12019 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -45,34 +45,31 @@ namespace {
 
   class ARMCodeEmitter {
   public:
-
     /// getBinaryCodeForInstr - This function, generated by the
     /// CodeEmitterGenerator using TableGen, produces the binary encoding for
     /// machine instructions.
-
     unsigned getBinaryCodeForInstr(const MachineInstr &MI);
   };
 
-  template< class machineCodeEmitter>	
-  class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass, 
-    	public ARMCodeEmitter
-  {
+  template<class CodeEmitter>
+  class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
+                                    public ARMCodeEmitter {
     ARMJITInfo                *JTI;
     const ARMInstrInfo        *II;
     const TargetData          *TD;
     TargetMachine             &TM;
-    machineCodeEmitter        &MCE;
+    CodeEmitter               &MCE;
     const std::vector<MachineConstantPoolEntry> *MCPEs;
     const std::vector<MachineJumpTableEntry> *MJTEs;
     bool IsPIC;
 
   public:
     static char ID;
-    explicit Emitter(TargetMachine &tm, machineCodeEmitter &mce)
+    explicit Emitter(TargetMachine &tm, CodeEmitter &mce)
       : MachineFunctionPass(&ID), JTI(0), II(0), TD(0), TM(tm),
       MCE(mce), MCPEs(0), MJTEs(0),
       IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
-    Emitter(TargetMachine &tm, machineCodeEmitter &mce,
+    Emitter(TargetMachine &tm, CodeEmitter &mce,
             const ARMInstrInfo &ii, const TargetData &td)
       : MachineFunctionPass(&ID), JTI(0), II(&ii), TD(&td), TM(tm),
       MCE(mce), MCPEs(0), MJTEs(0),
@@ -170,30 +167,28 @@ namespace {
     void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc,
                                intptr_t JTBase = 0);
   };
-  template <class machineCodeEmitter>
-  char Emitter<machineCodeEmitter>::ID = 0;
+  template <class CodeEmitter>
+  char Emitter<CodeEmitter>::ID = 0;
 }
 
 /// createARMCodeEmitterPass - Return a pass that emits the collected ARM code
 /// to the specified MCE object.
 
 namespace llvm {
-	
-FunctionPass *createARMCodeEmitterPass(
-    ARMTargetMachine &TM, MachineCodeEmitter &MCE)
-{
+
+FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
+                                       MachineCodeEmitter &MCE) {
   return new Emitter<MachineCodeEmitter>(TM, MCE);
 }
-FunctionPass *createARMJITCodeEmitterPass(
-    ARMTargetMachine &TM, JITCodeEmitter &JCE)
-{
+FunctionPass *createARMJITCodeEmitterPass(ARMTargetMachine &TM,
+                                          JITCodeEmitter &JCE) {
   return new Emitter<JITCodeEmitter>(TM, JCE);
 }
 
 } // end namespace llvm
 
-template< class machineCodeEmitter>
-bool Emitter< machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
+template<class CodeEmitter>
+bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
   assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
           MF.getTarget().getRelocationModel() != Reloc::Static) &&
          "JIT relocation model must be set to static or default!");
@@ -222,8 +217,8 @@ bool Emitter< machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
 
 /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
 ///
-template< class machineCodeEmitter>
-unsigned Emitter< machineCodeEmitter>::getShiftOp(unsigned Imm) const {
+template<class CodeEmitter>
+unsigned Emitter<CodeEmitter>::getShiftOp(unsigned Imm) const {
   switch (ARM_AM::getAM2ShiftOpc(Imm)) {
   default: assert(0 && "Unknown shift opc!");
   case ARM_AM::asr: return 2;
@@ -237,9 +232,9 @@ unsigned Emitter< machineCodeEmitter>::getShiftOp(unsigned Imm) const {
 
 /// getMachineOpValue - Return binary encoding of operand. If the machine
 /// operand requires relocation, record the relocation and return zero.
-template< class machineCodeEmitter>
-unsigned Emitter< machineCodeEmitter>::getMachineOpValue(const MachineInstr &MI,
-                                           const MachineOperand &MO) {
+template<class CodeEmitter>
+unsigned Emitter<CodeEmitter>::getMachineOpValue(const MachineInstr &MI,
+                                                 const MachineOperand &MO) {
   if (MO.isReg())
     return ARMRegisterInfo::getRegisterNumbering(MO.getReg());
   else if (MO.isImm())
@@ -267,18 +262,19 @@ unsigned Emitter< machineCodeEmitter>::getMachineOpValue(const MachineInstr &MI,
 
 /// emitGlobalAddress - Emit the specified address to the code stream.
 ///
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
-                                       bool NeedStub, intptr_t ACPV) {
-  MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
-                                             Reloc, GV, ACPV, NeedStub));
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+                                             bool NeedStub, intptr_t ACPV) {
+  MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
+                                             GV, ACPV, NeedStub));
 }
 
 /// emitExternalSymbolAddress - Arrange for the address of an external symbol to
 /// be emitted to the current location in the function, and allow it to be PC
 /// relative.
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitExternalSymbolAddress(const char *ES,
+                                                     unsigned Reloc) {
   MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
                                                  Reloc, ES));
 }
@@ -286,8 +282,9 @@ void Emitter< machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, uns
 /// emitConstPoolAddress - Arrange for the address of an constant pool
 /// to be emitted to the current location in the function, and allow it to be PC
 /// relative.
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned Reloc) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitConstPoolAddress(unsigned CPI,
+                                                unsigned Reloc) {
   // Tell JIT emitter we'll resolve the address.
   MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
                                                     Reloc, CPI, 0, true));
@@ -296,22 +293,23 @@ void Emitter< machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned R
 /// emitJumpTableAddress - Arrange for the address of a jump table to
 /// be emitted to the current location in the function, and allow it to be PC
 /// relative.
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitJumpTableAddress(unsigned JTIndex, 
+                                                unsigned Reloc) {
   MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
                                                     Reloc, JTIndex, 0, true));
 }
 
 /// emitMachineBasicBlock - Emit the specified address basic block.
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMachineBasicBlock(MachineBasicBlock *BB,
-                                           unsigned Reloc, intptr_t JTBase) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMachineBasicBlock(MachineBasicBlock *BB,
+                                              unsigned Reloc, intptr_t JTBase) {
   MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
                                              Reloc, BB, JTBase));
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitWordLE(unsigned Binary) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitWordLE(unsigned Binary) {
 #ifndef NDEBUG
   DOUT << "  0x" << std::hex << std::setw(8) << std::setfill('0')
        << Binary << std::dec << "\n";
@@ -319,8 +317,8 @@ void Emitter< machineCodeEmitter>::emitWordLE(unsigned Binary) {
   MCE.emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitDWordLE(uint64_t Binary) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitDWordLE(uint64_t Binary) {
 #ifndef NDEBUG
   DOUT << "  0x" << std::hex << std::setw(8) << std::setfill('0')
        << (unsigned)Binary << std::dec << "\n";
@@ -330,8 +328,8 @@ void Emitter< machineCodeEmitter>::emitDWordLE(uint64_t Binary) {
   MCE.emitDWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI) {
   DOUT << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI;
 
   NumEmitted++;  // Keep track of the # of mi's emitted
@@ -397,8 +395,8 @@ void Emitter< machineCodeEmitter>::emitInstruction(const MachineInstr &MI) {
   }
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) {
   unsigned CPI = MI.getOperand(0).getImm();       // CP instruction index.
   unsigned CPIndex = MI.getOperand(1).getIndex(); // Actual cp entry index.
   const MachineConstantPoolEntry &MCPE = (*MCPEs)[CPIndex];
@@ -465,8 +463,8 @@ void Emitter< machineCodeEmitter>::emitConstPoolInstruction(const MachineInstr &
   }
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr &MI) {
   const MachineOperand &MO0 = MI.getOperand(0);
   const MachineOperand &MO1 = MI.getOperand(1);
   assert(MO1.isImm() && "Not a valid so_imm value!");
@@ -507,8 +505,8 @@ void Emitter< machineCodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitLEApcrelJTInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitLEApcrelJTInstruction(const MachineInstr &MI) {
   // It's basically add r, pc, (LJTI - $+8)
   
   const TargetInstrDesc &TID = MI.getDesc();
@@ -536,8 +534,8 @@ void Emitter< machineCodeEmitter>::emitLEApcrelJTInstruction(const MachineInstr
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitPseudoMoveInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitPseudoMoveInstruction(const MachineInstr &MI) {
   unsigned Opcode = MI.getDesc().Opcode;
 
   // Part of binary is determined by TableGn.
@@ -576,15 +574,15 @@ void Emitter< machineCodeEmitter>::emitPseudoMoveInstruction(const MachineInstr
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::addPCLabel(unsigned LabelID) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::addPCLabel(unsigned LabelID) {
   DOUT << "  ** LPC" << LabelID << " @ "
        << (void*)MCE.getCurrentPCValue() << '\n';
   JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
   unsigned Opcode = MI.getDesc().Opcode;
   switch (Opcode) {
   default:
@@ -653,8 +651,9 @@ void Emitter< machineCodeEmitter>::emitPseudoInstruction(const MachineInstr &MI)
   }
 }
 
-template< class machineCodeEmitter>
-unsigned Emitter< machineCodeEmitter>::getMachineSoRegOpValue(const MachineInstr &MI,
+template<class CodeEmitter>
+unsigned Emitter<CodeEmitter>::getMachineSoRegOpValue(
+                                                const MachineInstr &MI,
                                                 const TargetInstrDesc &TID,
                                                 const MachineOperand &MO,
                                                 unsigned OpIdx) {
@@ -712,8 +711,8 @@ unsigned Emitter< machineCodeEmitter>::getMachineSoRegOpValue(const MachineInstr
   return Binary | ARM_AM::getSORegOffset(MO2.getImm()) << 7;
 }
 
-template< class machineCodeEmitter>
-unsigned Emitter< machineCodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
+template<class CodeEmitter>
+unsigned Emitter<CodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
   // Encode rotate_imm.
   unsigned Binary = (ARM_AM::getSOImmValRot(SoImm) >> 1)
     << ARMII::SoRotImmShift;
@@ -723,9 +722,9 @@ unsigned Emitter< machineCodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
   return Binary;
 }
 
-template< class machineCodeEmitter>
-unsigned Emitter< machineCodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
-                                         const TargetInstrDesc &TID) const {
+template<class CodeEmitter>
+unsigned Emitter<CodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
+                                             const TargetInstrDesc &TID) const {
   for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){
     const MachineOperand &MO = MI.getOperand(i-1);
     if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)
@@ -734,8 +733,9 @@ unsigned Emitter< machineCodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
   return 0;
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitDataProcessingInstruction(const MachineInstr &MI,
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitDataProcessingInstruction(
+                                                   const MachineInstr &MI,
                                                    unsigned ImplicitRd,
                                                    unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
@@ -798,8 +798,9 @@ void Emitter< machineCodeEmitter>::emitDataProcessingInstruction(const MachineIn
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitLoadStoreInstruction(const MachineInstr &MI,
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitLoadStoreInstruction(
+                                              const MachineInstr &MI,
                                               unsigned ImplicitRd,
                                               unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
@@ -873,9 +874,9 @@ void Emitter< machineCodeEmitter>::emitLoadStoreInstruction(const MachineInstr &
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMiscLoadStoreInstruction(const MachineInstr &MI,
-                                                  unsigned ImplicitRn) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMiscLoadStoreInstruction(const MachineInstr &MI,
+                                                        unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
   unsigned Form = TID.TSFlags & ARMII::FormMask;
   bool IsPrePost = (TID.TSFlags & ARMII::IndexModeMask) != 0;
@@ -957,8 +958,9 @@ static unsigned getAddrModeUPBits(unsigned Mode) {
   return Binary;
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitLoadStoreMultipleInstruction(
+                                                       const MachineInstr &MI) {
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -990,8 +992,8 @@ void Emitter< machineCodeEmitter>::emitLoadStoreMultipleInstruction(const Machin
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMulFrmInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMulFrmInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -1028,8 +1030,8 @@ void Emitter< machineCodeEmitter>::emitMulFrmInstruction(const MachineInstr &MI)
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitExtendInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitExtendInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -1066,8 +1068,8 @@ void Emitter< machineCodeEmitter>::emitExtendInstruction(const MachineInstr &MI)
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMiscArithInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMiscArithInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -1105,8 +1107,8 @@ void Emitter< machineCodeEmitter>::emitMiscArithInstruction(const MachineInstr &
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitBranchInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitBranchInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   if (TID.Opcode == ARM::TPsoft)
@@ -1124,8 +1126,8 @@ void Emitter< machineCodeEmitter>::emitBranchInstruction(const MachineInstr &MI)
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
   // Remember the base address of the inline jump table.
   uintptr_t JTBase = MCE.getCurrentPCValue();
   JTI->addJumpTableBaseAddr(JTIndex, JTBase);
@@ -1144,8 +1146,8 @@ void Emitter< machineCodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
   }
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMiscBranchInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMiscBranchInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Handle jump tables.
@@ -1225,8 +1227,8 @@ static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) {
   return Binary;
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitVFPArithInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitVFPArithInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -1265,8 +1267,9 @@ void Emitter< machineCodeEmitter>::emitVFPArithInstruction(const MachineInstr &M
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitVFPConversionInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitVFPConversionInstruction(
+      const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
   unsigned Form = TID.TSFlags & ARMII::FormMask;
 
@@ -1322,8 +1325,8 @@ void Emitter< machineCodeEmitter>::emitVFPConversionInstruction(const MachineIns
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -1357,8 +1360,9 @@ void Emitter< machineCodeEmitter>::emitVFPLoadStoreInstruction(const MachineInst
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitVFPLoadStoreMultipleInstruction(
+                                                       const MachineInstr &MI) {
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -1392,8 +1396,8 @@ void Emitter< machineCodeEmitter>::emitVFPLoadStoreMultipleInstruction(const Mac
   emitWordLE(Binary);
 }
 
-template< class machineCodeEmitter>
-void Emitter< machineCodeEmitter>::emitMiscInstruction(const MachineInstr &MI) {
+template<class CodeEmitter>
+void Emitter<CodeEmitter>::emitMiscInstruction(const MachineInstr &MI) {
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);