Rename MachineCodeForBasicBlock to MachineBasicBlock

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4318 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 22 insertions, 22 deletions

diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp
index ea20a3e92a..1857f89367 100644
--- a/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -8,7 +8,7 @@
 #include "SchedPriorities.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
 #include "llvm/Target/TargetMachine.h"
@@ -631,14 +631,14 @@ AssignInstructionsToSlots(class SchedulingManager& S, unsigned maxIssue)
 static void
 RecordSchedule(const BasicBlock* bb, const SchedulingManager& S)
 {
-  MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
+  MachineBasicBlock& mvec = MachineBasicBlock::get(bb);
   const MachineInstrInfo& mii = S.schedInfo.getInstrInfo();
   
 #ifndef NDEBUG
   // Lets make sure we didn't lose any instructions, except possibly
   // some NOPs from delay slots.  Also, PHIs are not included in the schedule.
   unsigned numInstr = 0;
-  for (MachineCodeForBasicBlock::iterator I=mvec.begin(); I != mvec.end(); ++I)
+  for (MachineBasicBlock::iterator I=mvec.begin(); I != mvec.end(); ++I)
     if (! mii.isNop((*I)->getOpCode()) &&
 	! mii.isDummyPhiInstr((*I)->getOpCode()))
       ++numInstr;
@@ -650,7 +650,7 @@ RecordSchedule(const BasicBlock* bb, const SchedulingManager& S)
     return;				// empty basic block!
   
   // First find the dummy instructions at the start of the basic block
-  MachineCodeForBasicBlock::iterator I = mvec.begin();
+  MachineBasicBlock::iterator I = mvec.begin();
   for ( ; I != mvec.end(); ++I)
     if (! mii.isDummyPhiInstr((*I)->getOpCode()))
       break;
@@ -1220,7 +1220,7 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S,
   // fill delay slots, otherwise, just discard them.
   //  
   unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1;
-  MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(node->getBB());
+  MachineBasicBlock& bbMvec = MachineBasicBlock::get(node->getBB());
   assert(bbMvec[firstDelaySlotIdx - 1] == brInstr &&
          "Incorrect instr. index in basic block for brInstr");
   
@@ -1325,8 +1325,8 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S,
   // Simply passing in an empty delayNodeVec will have this effect.
   // 
   delayNodeVec.clear();
-  const MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(bb);
-  for (unsigned i=0; i < bbMvec.size(); i++)
+  const MachineBasicBlock& bbMvec = MachineBasicBlock::get(bb);
+  for (unsigned i=0; i < bbMvec.size(); ++i)
     if (bbMvec[i] != brInstr &&
         mii.getNumDelaySlots(bbMvec[i]->getOpCode()) > 0)
       {
diff --git a/lib/CodeGen/InstrSched/SchedGraph.cpp b/lib/CodeGen/InstrSched/SchedGraph.cpp
index c3262c09df..cc3e5b5ed4 100644
--- a/lib/CodeGen/InstrSched/SchedGraph.cpp
+++ b/lib/CodeGen/InstrSched/SchedGraph.cpp
@@ -9,7 +9,7 @@
 #include "SchedGraph.h"
 #include "llvm/CodeGen/InstrSelection.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Function.h"
@@ -387,7 +387,7 @@ SchedGraph::addCDEdges(const TerminatorInst* term,
   // all preceding instructions in the basic block.  Use 0 latency again.
   // 
   const BasicBlock* bb = firstBrNode->getBB();
-  const MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
+  const MachineBasicBlock& mvec = MachineBasicBlock::get(bb);
   for (unsigned i=0, N=mvec.size(); i < N; i++) 
     {
       if (mvec[i] == termMvec[first])   // reached the first branch
@@ -480,7 +480,7 @@ SchedGraph::addMemEdges(const vector<SchedGraphNode*>& memNodeVec,
 // 
 void
 SchedGraph::addCallCCEdges(const vector<SchedGraphNode*>& memNodeVec,
-                           MachineCodeForBasicBlock& bbMvec,
+                           MachineBasicBlock& bbMvec,
                            const TargetMachine& target)
 {
   const MachineInstrInfo& mii = target.getInstrInfo();
@@ -753,7 +753,7 @@ SchedGraph::buildNodesforBB(const TargetMachine& target,
   
   // Build graph nodes for each VM instruction and gather def/use info.
   // Do both those together in a single pass over all machine instructions.
-  const MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
+  const MachineBasicBlock& mvec = MachineBasicBlock::get(bb);
   for (unsigned i=0; i < mvec.size(); i++)
     if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
       {
@@ -789,7 +789,7 @@ SchedGraph::buildNodesforBB(const TargetMachine& target,
         
         // Find the machine instruction that makes a copy of inval to (*PI).
         // This must be in the current basic block (bb).
-        const MachineCodeForVMInstr& mvec = MachineCodeForBasicBlock::get(*PI);
+        const MachineCodeForVMInstr& mvec = MachineBasicBlock::get(*PI);
         const MachineInstr* theCopy = NULL;
         for (unsigned i=0; i < mvec.size() && theCopy == NULL; i++)
           if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
@@ -882,7 +882,7 @@ SchedGraph::buildGraph(const TargetMachine& target)
   // 
   //----------------------------------------------------------------
       
-  MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(bb);
+  MachineBasicBlock& bbMvec = MachineBasicBlock::get(bb);
   
   // First, add edges to the terminator instruction of the basic block.
   this->addCDEdges(bb->getTerminator(), target);
diff --git a/lib/CodeGen/InstrSelection/InstrSelection.cpp b/lib/CodeGen/InstrSelection/InstrSelection.cpp
index 83ce0a7dfe..83f7927def 100644
--- a/lib/CodeGen/InstrSelection/InstrSelection.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelection.cpp
@@ -11,7 +11,7 @@
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include "llvm/Target/TargetMachine.h"
@@ -145,7 +145,7 @@ bool InstructionSelection::runOnFunction(Function &F)
   for (Function::iterator BI = F.begin(), BE = F.end(); BI != BE; ++BI)
     for (BasicBlock::iterator II = BI->begin(); II != BI->end(); ++II) {
       MachineCodeForInstruction &mvec = MachineCodeForInstruction::get(II);
-      MachineCodeForBasicBlock &MCBB = MachineCodeForBasicBlock::get(BI);
+      MachineBasicBlock &MCBB = MachineBasicBlock::get(BI);
       MCBB.insert(MCBB.end(), mvec.begin(), mvec.end());
     }
 
@@ -205,7 +205,7 @@ InstructionSelection::InsertCodeForPhis(Function &F)
       Target.getRegInfo().cpValue2Value(PhiCpRes, PN, mvec);
       
       // get an iterator to machine instructions in the BB
-      MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(BB);
+      MachineBasicBlock& bbMvec = MachineBasicBlock::get(BB);
       
       bbMvec.insert(bbMvec.begin(), mvec.begin(), mvec.end());
     }  // for each Phi Instr in BB
@@ -227,11 +227,11 @@ InstructionSelection::InsertPhiElimInstructions(BasicBlock *BB,
   
   assert (FirstMIOfTerm && "No Machine Instrs for terminator");
   
-  MachineCodeForBasicBlock &bbMvec = MachineCodeForBasicBlock::get(BB);
+  MachineBasicBlock &bbMvec = MachineBasicBlock::get(BB);
 
   // find the position of first machine instruction generated by the
   // terminator of this BB
-  MachineCodeForBasicBlock::iterator MCIt =
+  MachineBasicBlock::iterator MCIt =
     std::find(bbMvec.begin(), bbMvec.end(), FirstMIOfTerm);
 
   assert( MCIt != bbMvec.end() && "Start inst of terminator not found");
diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp
index 1b78d7a90b..666d5477b3 100644
--- a/lib/CodeGen/MachineBasicBlock.cpp
+++ b/lib/CodeGen/MachineBasicBlock.cpp
@@ -1,10 +1,10 @@
-//===-- MachineCodeForBasicBlock.cpp --------------------------------------===//
+//===-- MachineBasicBlock.cpp ---------------------------------------------===//
 // 
 // Collect the sequence of machine instructions for a basic block.
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 
 AnnotationID MCFBB_AID(
              AnnotationManager::getID("CodeGen::MachineBasicBlock"));
diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp
index 4d680754d0..23b8040c44 100644
--- a/lib/CodeGen/MachineFunction.cpp
+++ b/lib/CodeGen/MachineFunction.cpp
@@ -8,7 +8,7 @@
 
 #include "llvm/CodeGen/MachineInstr.h"  // For debug output
 #include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineFrameInfo.h"
@@ -303,7 +303,7 @@ MachineFunction::dump() const
     {
       std::cerr << "\n" << BB->getName() << " (" << (const void*)BB
                 << ")" << ":" << "\n";
-      MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(BB);
+      MachineBasicBlock& mvec = MachineBasicBlock::get(BB);
       for (unsigned i=0; i < mvec.size(); i++)
 	std::cerr << "\t" << *mvec[i];
     }