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| author | Dan Gohman <gohman@apple.com> | 2008-09-13 17:58:21 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-09-13 17:58:21 +0000 |
| commit | 7f7f365665a22e1b4397d0924f24b929607f9690 (patch) | |
| tree | cf93cc36bc9bf6bb3b78a416592b7a93c84efb22 /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 131357271f3824981b1d0572685fbc380983aa35 (diff) | |
| download | external_llvm-7f7f365665a22e1b4397d0924f24b929607f9690.tar.gz external_llvm-7f7f365665a22e1b4397d0924f24b929607f9690.tar.bz2 external_llvm-7f7f365665a22e1b4397d0924f24b929607f9690.zip | |
Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 940b166442..0a1419ce81 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -462,7 +462,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, for (unsigned i = CopyMI->getDesc().getNumOperands(), e = CopyMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = CopyMI->getOperand(i); - if (MO.isReg() && MO.isImplicit()) + if (MO.isRegister() && MO.isImplicit()) NewMI->addOperand(MO); if (MO.isDef() && li_->hasInterval(MO.getReg())) { unsigned Reg = MO.getReg(); @@ -867,7 +867,7 @@ void SimpleRegisterCoalescing::RemoveCopiesFromValNo(LiveInterval &li, // Each use MI may have multiple uses of this register. Change them all. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.getReg() == li.reg) + if (MO.isRegister() && MO.getReg() == li.reg) MO.setReg(DstReg); } JoinedCopies.insert(MI); |