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authorEvan Cheng <evan.cheng@apple.com>2009-05-11 22:33:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-05-11 22:33:01 +0000
commit56cfcd7b81fd45eae68c8b40a058b41a79640fe8 (patch)
tree70eb5ebee02553ba2b892ce1ff7f7bbaad77a682 /lib/CodeGen/SimpleRegisterCoalescing.cpp
parent4e32b79171e2ff19f2061ce7ae5fe9f3693ebbb3 (diff)
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Teach LSR to optimize more loop exit compares, i.e. change them to use postinc iv value. Previously LSR would only optimize those which are in the loop latch block. However, if LSR can prove it is safe (and profitable), it's now possible to change those not in the latch blocks to use postinc values.
Also, if the compare is the only use, LSR would place the iv increment instruction before the compare instead in the latch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71485 91177308-0d34-0410-b5e6-96231b3b80d8
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