EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like

(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 13 insertions, 3 deletions

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index b616b7e482..bb5379c349 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -567,9 +567,6 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node,
     // TODO: If the node is a use of a CopyFromReg from a physical register
     // fold the extract into the copy now
 
-    // TODO: Add tracking info to SSARegMap of which vregs are subregs
-    // to allow coalescing in the allocator
-    
     // Create the extract_subreg machine instruction.
     MachineInstr *MI =
       new MachineInstr(BB, TII->get(TargetInstrInfo::EXTRACT_SUBREG));
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index c1a8509615..2baf24d7d5 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1097,6 +1097,11 @@ namespace {
         // CopyToReg should be close to its uses to facilitate coalescing and
         // avoid spilling.
         return 0;
+      else if (Opc == TargetInstrInfo::EXTRACT_SUBREG ||
+               Opc == TargetInstrInfo::INSERT_SUBREG)
+        // EXTRACT_SUBREG / INSERT_SUBREG should be close to its use to
+        // facilitate coalescing.
+        return 0;
       else if (SU->NumSuccs == 0)
         // If SU does not have a use, i.e. it doesn't produce a value that would
         // be consumed (e.g. store), then it terminates a chain of computation.
@@ -1308,6 +1313,14 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
           // Be conservative. Ignore if nodes aren't at the same depth.
           if (SuccSU->Depth != SU->Depth)
             continue;
+          if (!SuccSU->Node || !SuccSU->Node->isTargetOpcode())
+            continue;
+          // Don't constraint extract_subreg / insert_subreg these may be
+          // coalesced away. We don't them close to their uses.
+          unsigned SuccOpc = SuccSU->Node->getTargetOpcode();
+          if (SuccOpc == TargetInstrInfo::EXTRACT_SUBREG ||
+              SuccOpc == TargetInstrInfo::INSERT_SUBREG)
+            continue;
           if ((!canClobber(SuccSU, DUSU) ||
                (hasCopyToRegUse(SU) && !hasCopyToRegUse(SuccSU)) ||
                (!SU->isCommutable && SuccSU->isCommutable)) &&