diff options
author | Dan Gohman <gohman@apple.com> | 2009-01-15 19:20:50 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2009-01-15 19:20:50 +0000 |
commit | 96eb47aa1be2f07003241a148e7b7db87bfa9104 (patch) | |
tree | b8ca5d82fd79edad2fa840c1cfdd039e08ca4466 /lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp | |
parent | 6c62d0a680ef3e428ce889a7107bb836fcdcc3a3 (diff) | |
download | external_llvm-96eb47aa1be2f07003241a148e7b7db87bfa9104.tar.gz external_llvm-96eb47aa1be2f07003241a148e7b7db87bfa9104.tar.bz2 external_llvm-96eb47aa1be2f07003241a148e7b7db87bfa9104.zip |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp index e93d4a64f3..282b53363e 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp @@ -381,7 +381,7 @@ void ScheduleDAGSDNodes::EmitSubregNode(SDNode *Node, unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); // Create the extract_subreg machine instruction. - MachineInstr *MI = BuildMI(*MF, TII->get(TargetInstrInfo::EXTRACT_SUBREG)); + MachineInstr *MI = BuildMI(MF, TII->get(TargetInstrInfo::EXTRACT_SUBREG)); // Figure out the register class to create for the destreg. unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); @@ -427,7 +427,7 @@ void ScheduleDAGSDNodes::EmitSubregNode(SDNode *Node, } // Create the insert_subreg or subreg_to_reg machine instruction. - MachineInstr *MI = BuildMI(*MF, TII->get(Opc)); + MachineInstr *MI = BuildMI(MF, TII->get(Opc)); MI->addOperand(MachineOperand::CreateReg(VRBase, true)); // If creating a subreg_to_reg, then the first input operand @@ -484,7 +484,7 @@ void ScheduleDAGSDNodes::EmitNode(SDNode *Node, bool IsClone, #endif // Create the new machine instruction. - MachineInstr *MI = BuildMI(*MF, II); + MachineInstr *MI = BuildMI(MF, II); // Add result register values for things that are defined by this // instruction. @@ -568,7 +568,7 @@ void ScheduleDAGSDNodes::EmitNode(SDNode *Node, bool IsClone, --NumOps; // Ignore the flag operand. // Create the inline asm machine instruction. - MachineInstr *MI = BuildMI(*MF, TII->get(TargetInstrInfo::INLINEASM)); + MachineInstr *MI = BuildMI(MF, TII->get(TargetInstrInfo::INLINEASM)); // Add the asm string as an external symbol operand. const char *AsmStr = |