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authorStephen Hines <srhines@google.com>2014-04-23 16:57:46 -0700
committerStephen Hines <srhines@google.com>2014-04-24 15:53:16 -0700
commit36b56886974eae4f9c5ebc96befd3e7bfe5de338 (patch)
treee6cfb69fbbd937f450eeb83bfb83b9da3b01275a /lib/CodeGen/InterferenceCache.cpp
parent69a8640022b04415ae9fac62f8ab090601d8f889 (diff)
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Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
Diffstat (limited to 'lib/CodeGen/InterferenceCache.cpp')
-rw-r--r--lib/CodeGen/InterferenceCache.cpp22
1 files changed, 19 insertions, 3 deletions
diff --git a/lib/CodeGen/InterferenceCache.cpp b/lib/CodeGen/InterferenceCache.cpp
index 427225dbdc..61d065a8a2 100644
--- a/lib/CodeGen/InterferenceCache.cpp
+++ b/lib/CodeGen/InterferenceCache.cpp
@@ -22,6 +22,22 @@ using namespace llvm;
// Static member used for null interference cursors.
InterferenceCache::BlockInterference InterferenceCache::Cursor::NoInterference;
+// Initializes PhysRegEntries (instead of a SmallVector, PhysRegEntries is a
+// buffer of size NumPhysRegs to speed up alloc/clear for targets with large
+// reg files). Calloced memory is used for good form, and quites tools like
+// Valgrind too, but zero initialized memory is not required by the algorithm:
+// this is because PhysRegEntries works like a SparseSet and its entries are
+// only valid when there is a corresponding CacheEntries assignment. There is
+// also support for when pass managers are reused for targets with different
+// numbers of PhysRegs: in this case PhysRegEntries is freed and reinitialized.
+void InterferenceCache::reinitPhysRegEntries() {
+ if (PhysRegEntriesCount == TRI->getNumRegs()) return;
+ free(PhysRegEntries);
+ PhysRegEntriesCount = TRI->getNumRegs();
+ PhysRegEntries = (unsigned char*)
+ calloc(PhysRegEntriesCount, sizeof(unsigned char));
+}
+
void InterferenceCache::init(MachineFunction *mf,
LiveIntervalUnion *liuarray,
SlotIndexes *indexes,
@@ -30,7 +46,7 @@ void InterferenceCache::init(MachineFunction *mf,
MF = mf;
LIUArray = liuarray;
TRI = tri;
- PhysRegEntries.assign(TRI->getNumRegs(), 0);
+ reinitPhysRegEntries();
for (unsigned i = 0; i != CacheEntries; ++i)
Entries[i].clear(mf, indexes, lis);
}
@@ -105,7 +121,7 @@ bool InterferenceCache::Entry::valid(LiveIntervalUnion *LIUArray,
void InterferenceCache::Entry::update(unsigned MBBNum) {
SlotIndex Start, Stop;
- tie(Start, Stop) = Indexes->getMBBRange(MBBNum);
+ std::tie(Start, Stop) = Indexes->getMBBRange(MBBNum);
// Use advanceTo only when possible.
if (PrevPos != Start) {
@@ -182,7 +198,7 @@ void InterferenceCache::Entry::update(unsigned MBBNum) {
BI = &Blocks[MBBNum];
if (BI->Tag == Tag)
return;
- tie(Start, Stop) = Indexes->getMBBRange(MBBNum);
+ std::tie(Start, Stop) = Indexes->getMBBRange(MBBNum);
}
// Check for last interference in block.