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author | Chris Lattner <sabre@nondot.org> | 2002-02-12 22:39:50 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2002-02-12 22:39:50 +0000 |
commit | 455889aa79e3463a4b0f2161e3d9d72a683268b6 (patch) | |
tree | af1cb8e20b69e33a7a744365fb6e15445abf81ed /lib/CodeGen/InstrSched/InstrScheduling.cpp | |
parent | cc179d3ab85fd19c3fd9586409c69d14fbb6c642 (diff) | |
download | external_llvm-455889aa79e3463a4b0f2161e3d9d72a683268b6.tar.gz external_llvm-455889aa79e3463a4b0f2161e3d9d72a683268b6.tar.bz2 external_llvm-455889aa79e3463a4b0f2161e3d9d72a683268b6.zip |
* Pull BasicBlock::pred_* and BasicBlock::succ_* out of BasicBlock.h and into
llvm/Support/CFG.h
* Make pred & succ iterators for intervals global functions
* Add #includes that are now neccesary because BasicBlock.h doesn't include
InstrTypes.h anymore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1750 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/InstrSched/InstrScheduling.cpp')
-rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index 6e6d14c7c8..edf84d4cad 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -17,6 +17,7 @@ #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h" // FIXME: Remove when AnalysisUsage sets can be symbolic! #include "llvm/Target/TargetMachine.h" #include "llvm/BasicBlock.h" +#include "llvm/Instruction.h" #include "SchedPriorities.h" #include <ext/hash_set> #include <algorithm> @@ -1287,14 +1288,11 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S, SchedGraph *graph) { const MachineInstrInfo& mii = S.getInstrInfo(); - const TerminatorInst *termInstr = bb->getTerminator(); + const Instruction *termInstr = (Instruction*)bb->getTerminator(); MachineCodeForInstruction &termMvec=MachineCodeForInstruction::get(termInstr); vector<SchedGraphNode*> delayNodeVec; const MachineInstr* brInstr = NULL; - assert(termInstr->getOpcode() != Instruction::Call - && "Call used as terminator?"); - if (termInstr->getOpcode() != Instruction::Ret) { // To find instructions that need delay slots without searching the full |